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MAX9381ESA Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX9381ESA Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 7 page Lowest Power 3.0GHz ECL/PECL Differential Data and Clock D Flip-Flop _______________________________________________________________________________________ 3 AC ELECTRICAL CHARACTERISTICS (VCC - VEE = 2.25V to 5.5V (TA = +25°C to +85°C), VCC - VEE = 2.375V to 5.5V (TA = -40°C to +25°C), outputs terminated with 50 Ω ±1% to VCC - 2.0V, fCLK ≤ 3.0GHz, input transition time = 125ps (20% to 80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to smaller of |VCC - VEE| or 3V, unless otherwise noted. Typical values are at VCC - VEE = 3.3V, VIHD = VCC - 1.0V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1, 5) Note 1: Measurements are made with the device in thermal equilibrium. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. Note 3: DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full oper- ating temperature range. Note 4: All pins floating except VCC and VEE. Note 5: Guaranteed by design and characterization, and are not production tested. Limits are set to ±6 sigma. Note 6: Device jitter added to the input clock. -40 °C +25 °C +85 °C PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Propagation Delay CLK, CLK to Q, Q tPHL tPLH Figure 2 370 328 405 490 ps Maximum Clock Frequency fCLKMAX VOD ≥ 300mV 3.0 3.0 3.0 GHz Setup Time tS Figure 2 100 100 100 ps Hold Time tH Figure 2 50 50 50 ps Added Random Jitter (Note 6) tRJ 0.2 0.8 0.2 0.8 0.2 0.8 ps (RMS) Differential Output Rise/Fall Time tR/tF 20% to 80%, Figure 2 70 120 170 80 120 180 90 120 200 ps |
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