Lowest Power 3.0GHz ECL/PECL

Differential Data and Clock D Flip-Flop

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3

AC ELECTRICAL CHARACTERISTICS

Ω

Note 1: Measurements are made with the device in thermal equilibrium.

Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.

Note 3: DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full oper-

ating temperature range.

Note 5: Guaranteed by design and characterization, and are not production tested. Limits are set to ±6 sigma.

Note 6: Device jitter added to the input clock.

-40

°C

+25

°C

+85

°C

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Propagation Delay

CLK,

CLK to Q, Q

Figure 2

370

328

405

490

ps

Maximum Clock

Frequency

≥ 300mV

3.0

3.0

3.0

GHz

Setup Time

Figure 2

100

100

100

ps

Hold Time

Figure 2

50

50

50

ps

Added Random

Jitter (Note 6)

0.2

0.8

0.2

0.8

0.2

0.8

ps

(RMS)

Differential Output

Rise/Fall Time

20% to 80%,

Figure 2

70

120

170

80

120

180

90

120

200

ps