EP610

Specification Number EP610-CI (AT) REV -

Page 8 of 9

Symbol

Parameter

Conditions

Min

Max

Unit

Input to non-registered output

C1 = 35 pF Notes (2), (3)

35

ns

I/O input to non-registered output

37

ns

Input to output enable

35

ns

Input to output disable

C1 = 5 pF Notes (2), (3), (4), (5)

35

ns

Asynchronous output clear time

C1 = 35 pF Notes (2), (3)

37

ns

Maximum clock frequency

Note (2), (6), (7)

37.0

MHz

Global clock input setup time

Note (2), (3)

27

ns

Global clock input hold time

Note (3)

0

ns

Global clock high time

Note (4)

12

ns

Global clock low time

Note (4)

12

ns

Global clock to output delay

20

ns

Global clock minimum period

Note (4), (8)

35

ns

Global clock internal maximum frequency

Note (8)

28.5

MHz

Array clock input setup time

Notes (2), (3), (4)

8

ns

Array clock input hold time

Notes (2), (3), (4)

12

ns

Array clock high time

Notes (3), (4)

12

ns

Array clock low time

Notes (3), (4)

12

ns

Array clock to output delay

Notes (2), (3)

37

ns

Array clock minimum period

Notes (4), (8)

35

ns

Array clock internal maximum frequency

Notes (4), (8)

28.6

MHz

Notes to tables:

(1) Screening and characterization of AC delay parameters are conducted at 10 MHz or less.

pure inputs; all other product terms in the macrocell are held low by one EPROM cell. Other patterns may result

pattern in which only one pure input switches at a time.

(3) When the Turbo Bit is not set (non-turbo mode), a non-turbo adder of 30 ns (maximum) is added to this

parameter to determine worst-case timing. Parameters may not be tested in non-turbo mode, but are

guaranteed to the limits specified. Devices operating in non-turbo mode require one input or I/O transition to

guarantee that the device will enter the correct power-up state.

(4) These parameters may not be tested, but are guaranteed to the limits specified in the table under “Absolute

Maximum Ratings” on page 3.

(8) Specified with device programmed as a 16-bit counter with no output loading.