TLV5625

2.7V TO 5.5V LOW POWER DUAL 8BIT DIGITALTOANALOG

CONVERTER WITH POWER DOWN

SLAS233D − JULY 1999 − REVISED JULY 2002

4

POST OFFICE BOX 655303

electrical characteristics over recommended operating conditions (unless otherwise noted)

power supply

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IDD

Power supply current

No load, All inputs = AGND or

Fast

1.8

2.3

mA

IDD

Power supply current

No load, All inputs = AGND or

VDD, DAC latch = 0x800

Slow

0.8

1

mA

IDD

Power supply current

VDD, DAC latch = 0x800

Slow

0.8

1

mA

DD

VDD, DAC latch = 0x800

Slow

0.8

1

Power-down supply current

1

3

µA

PSRR

Power supply rejection ratio

Zero scale, See Note 2

−65

dB

PSRR

Power supply rejection ratio

Full scale, See Note 3

−65

dB

NOTES:

2. Power supply rejection ratio at zero scale is measured by varying VDD and is given by:

PSRR = 20 log [(EZS(VDDmax) − EZS(VDDmin)/VDDmax]

3. Power supply rejection ratio at full scale is measured by varying VDD and is given by:

PSRR = 20 log [(EG(VDDmax) − EG(VDDmin)/VDDmax]

static DAC specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Resolution

8

bits

INL

Integral nonlinearity

See Note 4

±0.3

±0.5

LSB

DNL

Differential nonlinearity

See Note 5

±0.07

±0.2

LSB

EZS

Zero-scale error (offset error at zero scale)

See Note 6

±12

mV

EZS TC

Zero-scale-error temperature coefficient

See Note 7

10

ppm/

°C

EG

Gain error

See Note 8

±0.5

% full

scale V

EG TC

Gain-error temperature coefficient

See Note 9

10

ppm/

°C

NOTES:

4. The relative accuracy of integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum deviation of the output

from the line between zero and full scale, excluding the effects of zero-code and full-scale errors.

5. The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the measured and ideal

1-LSB amplitude change of any two adjacent codes.

6. Zero-scale error is the deviation from zero voltage output when the digital input code is zero.

7. Zero-scale error temperature coefficient is given by: EZS TC = [EZS (Tmax) − EZS (Tmin)]/2Vref × 106/(Tmax − Tmin).

8. Gain error is the deviation from the ideal output (2Vref − 1 LSB) with an output load of 10 kΩ.

9. Gain temperature coefficient is given by: EG TC = [EG (Tmax) − Eg (Tmin)]/2Vref × 106/(Tmax − Tmin).

output specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VO

Output voltage range

RL = 10 kΩ

0

VDD−0.4

V

Output load regulation accuracy

VO = 4.096 V, 2.048 V RL = 2 kΩ

±0.29

% FS

reference input

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VI

Input voltage range

0

VDD−1.5

V

RI

Input resistance

10

M

Ω

CI

Input capacitance

5

pF

Reference input bandwidth

REF = 0.2 Vpp + 1.024 V dc

Fast

1.3

MHz

Reference input bandwidth

REF = 0.2 Vpp + 1.024 V dc

Slow

525

kHz

Reference feedthrough

REF = 1 Vpp at 1 kHz + 1.024 V dc (see Note 10)

−80

dB

NOTE 10: Reference feedthrough is measured at the DAC output with an input code = 0x000.