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CY7C63743-SXC Datasheet(PDF) 10 Page - Cypress Semiconductor |
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CY7C63743-SXC Datasheet(HTML) 10 Page - Cypress Semiconductor |
10 / 49 page CY7C63722 CY7C63723 CY7C63743 FOR FOR Document #: 38-08022 Rev. *B Page 10 of 49 9.0 Clocking The chip can be clocked from either the internal on-chip clock, or from an oscillator based on an external resonator/crystal, as shown in Figure 9-1. No additional capacitance is included on chip at the XTALIN/OUT pins. Operation is controlled by the Clock Configuration Register, Figure 9-2. Bit 7: Ext. Clock Resume Delay External Clock Resume Delay bit selects the delay time when switching to the external oscillator from the internal oscillator mode, or when waking from suspend mode with the external oscillator enabled. 1 = 4 ms delay. 0 = 128 µs delay. The delay gives the oscillator time to start up. The shorter time is adequate for operation with ceramic resonators, while the longer time is preferred for start-up with a crystal. (These times do not include an initial oscillator start-up time which depends on the resonating element. This time is typically 50–100 µs for ceramic resonators and 1–10 ms for crystals). Note that this bit only selects the delay time for the external clock mode. When waking from suspend mode with the internal oscillator (Bit 0 is LOW), the delay time is only 8 µs in addition to a delay of approximately 1 µs for the oscillator to start. Bit [6:4]: Wake-up Timer Adjust Bit [2:0] The Wake-up Timer Adjust Bits are used to adjust the Wake-up timer period. If the Wake-up interrupt is enabled in the Global Interrupt Enable Register, the microcontroller will generate wake-up interrupts periodically. The frequency of these periodical wake-up interrupts is adjusted by setting the Wake-up Tim- er Adjust Bit [2:0], as described in Section 11.2. One com- mon use of the wake-up interrupts is to generate periodical wake-up events during suspend mode to check for chang- es, such as looking for movement in a mouse, while main- taining a low average power. Bit 3: Low-voltage Reset Disable When VCC drops below VLVR (see Section 25.0 for the val- ue of VLVR) and the Low-voltage Reset circuit is enabled, the microcontroller enters a partial suspend state for a pe- riod of tSTART (see Section 26.0 for the value of tSTART). Program execution begins from address 0x0000 after this tSTART delay period. This provides time for VCC to stabilize Figure 9-1. Clock Oscillator On-chip Circuit XTALOUT XTALIN Clk2x (12 MHz) Clock Doubler Clk1x (6 MHz) (to Microcontroller) (to USB SIE) Port 2.1 Internal Osc Int Clk Output Disable Ext Clk Enable Bit # 76543210 Bit Name Ext. Clock Resume Delay Wake-up Timer Adjust Bit [2:0] Low-voltage Reset Disable Precision USB Clocking Enable Internal Clock Output Disable External Oscillator Enable Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Reset 00000000 Figure 9-2. Clock Configuration Register (Address 0xF8) |
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