DAC3174IRGCT datasheet(6/40 Pages) TI

Part #	DAC3174IRGCT

Description	Dual 14-bit 500 MSPS Digital to Analog Converter

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Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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DACCLKP

DACCLKN

CLKVDD18

NC

DA_CLKP

DA_CLKN

VFUSE

(MSB) DA6P

DA6N

DA5P

DA5N

DA4P

DA4N

DA3P

DA3N

DB3P

TXENABLE

ALARM

SDO

IOVDD

SDIO

SCLK

SDENB

RESETB

DB0N

DB0P (LSB)

DB1N

DB1P

DB2N

DB2P

DB3N

GND PAD (backside)

DAC3174

SLAS837A – APRIL 2013 – REVISED MAY 2013

www.ti.com

PIN OUT – DUAL BUS MODE

PIN ASSIGNMENT TABLE – DUAL BUS MODE

I/O

DESCRIPTION

NAME

NO.

CONTROL/SERIAL

SCLK

43

I

Serial interface clock. Internal pull-down.

SDENB

42

I

Serial interface clock. Internal pull-up.

SDIO

44

I/O

Bi-directional serial data in 3 pin mode (default). In 4-pin interface mode (register sif4_ena (config 0,

bit 9)), the SDIO pin in an input only. Internal Pull-down.

SDO

46

O

Uni-directional serial interface data in 4 pin mode (register sif4_ena (config 0, bit 9)). The SDO pin is

tri-stated in 3-pin interface mode (default). Internal Pulldown.

RESETB

41

I

Serial interface reset input. Active low. Initialized internal registers during high to low transition.

Asynchronous. Internal pull-up.

ALARM

47

O

CMOS output for ALARM condition.

TXENABLE

48

I

Transmit enable active high input. TXENABLE must be high for the DATA to the DAC to be enabled.

When TXENABLE is low, the digital logic section is forced to all 0, and any input data is ignored.

Internal pull-down.

SLEEP

49

I

Puts device in sleep, active high. Internal pull-down.

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