AFE0064

As explained before the device samples the integrator output twice, Reset sample ( SHR) and Signal sample

(SHS).

Case 2: (Integrator down mode, INTUPz = 1)

As explained before the device samples the integrator output twice, Reset sample ( SHR) and Signal sample

(SHS).

The differential output from the AFE0064 rejects common-mode noise from the board helping to maximize noise

performance of the system. The following table provides details of integrator feedback ranges, feedback

capacitor, and corresponding AFE0064 output at zero and full scale input charge.

Table 1. AFE0064 Range Selection to Device Analog Output Mapping

REFP

2.25

REFP-REFM

1.4

REFM

0.85

INTEGRATE UP MODE

INTEGRATE DOWN MODE

(INTUPz=0), e– counting

(INTUPz=1), hole+ counting

At 0 charge I/p

At FS charge I/p

At 0 charge I/p

At FS charge I/p

Typical FS

Int FB Cap= (Qr)/

Range

Charge Range

(REFP-REFM)

OUTP

OUTM

OUTP

OUTM

OUTP

OUTM

OUTP

OUTM

(Qr) pC

… pF

0

0.13

0.0929

1

0.25

0.1786

2

0.5

0.3571

3

1.2

0.8571

2.25

0.85

0.85

2.25

0.85

2.25

2.25

0.85

4

2.4

1.7143

5

4.8

3.4286

6

7.2

5.1429

7

9.6

6.8571

The following section provides detailed timing of data read. There are two output drivers. Data for channel

number 63 to 32 is available on output driver 1 and data for channel number 31 to 0 is available on output driver

0. Data from two drivers can be available simultaneously or sequentially depending on the status of pin

SMT_MD.

Figure 5. Device Data Read in Sequential Mode (SMT_MD = 0)

Copyright © 2009, Texas Instruments Incorporated

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Product Folder Link(s) :AFE0064