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M3062AFCTFP Datasheet(PDF) 8 Page - Renesas Technology Corp |
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M3062AFCTFP Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 103 page M16C/62P Group (M16C/62P, M16C/62PT) 1. Overview Rev.2.41 Jan 10, 2006 Page 6 of 96 REJ03B0001-0241 Figure 1.2 M16C/62P Group (M16C/62P, M16C/62PT) 80-pin version Block Diagram Timer (16-bit) Output (timer A): 5 Input (timer B): 6 Internal peripheral functions Watchdog timer (15 bits) DMAC (2 channels) D/A converter (8 bits X 2 channels) A/D converter (10 bits X 8 channels Expandable up to 26 channels) UART or clock synchronous serial I/O (2 channels) UART (1 channel) System clock generation circuit XIN-XOUT XCIN-XCOUT PLL frequency synthesizer On-chip oscillator M16C/60 series16-bit CPU core Port P0 8 Port P2 8 Port P3 8 Port P4 4 Port P5 8 Port P6 8 CRC arithmetic circuit (CCITT ) (Polynomial : X16+X12+X5+1) Memory ROM (1) RAM (2) NOTES : 1. ROM size depends on microcomputer type. 2. RAM size depends on microcomputer type. 3. To use a UART2, set the CRD bit in the U2C0 register to “1” (CTS/RTS function disabled). 4. There is no external connections for port P1, P4_4 to P4_7, P7_2 to P7_5 and P9_1 in 80-pin version. Set the direction bits in these ports to “1” (output mode), and set the output data to “0” (“L”) using the program. Clock synchronous serial I/O (8 bits X 2 channels) R0L R0H R1H R1L R2 R3 SB FLG USP ISP INTB PC Multiplier A0 A1 FB (4) (3) |
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