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ISL95839HRTZ Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL95839HRTZ Datasheet(HTML) 11 Page - Intersil Corporation |
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11 / 36 page  ISL95839 11 FN8315.0 May 9, 2013 Figure 6 shows the operation principles during load insertion response. The COMP voltage rises during load insertion, generating the master clock signal more quickly, so the PWM pulses turn on earlier, increasing the effective switching frequency, which allows for higher control loop bandwidth than conventional fixed frequency PWM controllers. The VW voltage rises as the COMP voltage rises, making the PWM pulses wider. During load release response, the COMP voltage falls. It takes the master clock circuit longer to generate the next master clock signal so the PWM pulse is held off until needed. The VW voltage falls as the COMP voltage falls, reducing the current PWM pulse width. This kind of behavior gives the controller excellent response speed. The fact that all the phases share the same VW window voltage also ensures excellent dynamic current balance among phases. Diode Emulation and Period Stretching ISL95839 can operate in diode emulation (DE) mode to improve light load efficiency. In DE mode, the low-side MOSFET conducts when the current is flowing from source to drain and doesn’t allow reverse current, emulating a diode. As Figure 7 shows, when LGATE is on, the low-side MOSFET carries current, creating negative voltage on the phase node due to the voltage drop across the ON-resistance. The controller monitors the current through monitoring the phase node voltage. It turns off LGATE when the phase node voltage reaches zero to prevent the inductor current from reversing the direction and creating unnecessary power loss. If the load current is light enough, as Figure 7 shows, the inductor current will reach and stay at zero before the next phase node pulse and the regulator is in discontinuous conduction mode (DCM). If the load current is heavy enough, the inductor current will never reach 0A, and the regulator is in CCM although the controller is in DE mode. Figure 8 shows the operation principle in diode emulation mode at light load. The load gets incrementally lighter in the three cases from top to bottom. The PWM on-time is determined by the VW window size, therefore is the same, making the inductor current triangle the same in the three cases. The controller clamps the master ripple capacitor voltage Vcrm and the slave ripple capacitor voltage Vcrs in DE mode to make it mimic the inductor current. It takes the Vcrm longer to hit COMP, naturally stretching the switching period. The inductor current triangles move further apart from each other such that the inductor current average value is equal to the load current. The reduced switching frequency helps increase light load efficiency. FIGURE 5. R3 ™ MODULATOR OPERATION PRINCIPLES IN STEADY STATE COMP Vcrm M aster Clock PW M 1 VW Clock1 PW M 2 Clock2 HYSTERETIC WINDOW PW M 3 Vcrs3 Clock3 Vcrs2 Vcrs1 VW FIGURE 6. R3 ™ MODULATOR OPERATION PRINCIPLES IN LOAD INSERTION RESPONSE COMP Vcrm Master Clock PWM1 Vcrs1 VW Clock1 PWM2 Vcrs2 Clock2 PWM3 Clock3 Vcrs3 VW UGAT E P h ase IL LG A T E FIGURE 7. DIODE EMULATION |
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