ICS810001DK-21 REVISION B APRIL 13, 2010

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©2010 Integrated Device Technology, Inc.

ICS810001-21 Data Sheet

FEMTOCLOCK™ DUAL VCXO VIDEO PLL

Applications Information

Recommendations for Unused Input Pins

Inputs:

CLK Inputs

For applications not requiring the use of a clock input, it can be left

floating. Though not required, but for additional protection, a 1k

Ω

resistor can be tied from the CLK input to ground.

LVCMOS Control Pins

All control pins have internal pullups or pulldowns; additional

resistance is not required but can be added for additional protection.

A 1k

Ω resistor can be used.

Power Supply Filtering Technique

As in any high speed analog circuitry, the power supply pins are

vulnerable to random noise. To achieve optimum jitter perform ance,

power supply isolation is required. The ICS810001-21 provides

separate power supplies to isolate any high switching noise from the

individually connected to the power supply plane through vias, and

0.01µF bypass capacitors should be used for each pin. Figure 1

requires that an additional 10

Ω resistor along with a 10µF bypass

Figure 1. Power Supply Filtering

3.3V

10

Ω

10

Ω

10µF

.01µF

.01µF

10µF

.01µF