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ADuM5241ARZ Datasheet(PDF) 4 Page - Analog Devices

Part # ADuM5241ARZ
Description  Dual-Channel Isolators with isoPower Integrated DC-to-DC Converter, 50 mW
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADuM5241ARZ Datasheet(HTML) 4 Page - Analog Devices

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ADuM5240/ADuM5241/ADuM5242
Data Sheet
Rev. B | Page 4 of 16
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
AC SPECIFICATIONS
Minimum Pulse Width5
PW
100
ns
C
L = 15 pF, CMOS signal levels
Maximum Data Rate6
1
Mbps
C
L = 15 pF, CMOS signal levels
Propagation Delay7
t
PHL, tPLH
25
70
ns
C
L = 15 pF, CMOS signal levels
Pulse Width Distortion, |t
PLH − tPHL|
8
PWD
3
ns
C
L = 15 pF, CMOS signal levels
Propagation Delay Skew8
t
PSK
45
ns
C
L = 15 pF, CMOS signal levels
Channel-to-Channel Matching,
Codirectional Channels9
t
PSKCD
3
ns
C
L = 15 pF, CMOS signal levels
Channel-to-Channel Matching,
Opposing-Directional Channels9
t
PSKCD
15
ns
C
L = 15 pF, CMOS signal levels
Output Rise/Fall Time (10% to 90%)
t
R/tF
2.5
ns
C
L = 15 pF, CMOS signal levels
Common-Mode Transient
Immunity at Logic High Output
|CM
H|
25
35
kV/µs
V
Ix = VDD, VISO, VCM = 1000 V,
transient magnitude = 800 V
Common-Mode Transient
Immunity at Logic Low Output
|CM
L|
25
35
kV/µs
V
Ix = 0 V, VCM = 1000 V,
transient magnitude = 800 V
Refresh Frequency
f
r
1.0
MHz
Switching Frequency
f
OSC
300
MHz
1 Peak noise occurs at frequency corresponding to the refresh frequency (see the PCB Layout section).
2 I
DD (DISABLE) supply current values are specified with no load present on the digital outputs.
3 I
ISO (DISABLE) supply current values are specified with no load present on the digital outputs and power sourced by an external supply.
4 Enable/disable threshold is the V
DD voltage at which the internal dc-to-dc converter is enabled/disabled.
5 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
6 The maximum data rate is the fastest data rate at which the specified pulse width distortion and V
ISO supply voltage is guaranteed.
7 t
PHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
8 t
PSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
9 Channel-to-channel matching is the absolute value of the difference in propagation delays between the two channels when operated with identical loads.


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