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FQN1N50CTA Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FQN1N50CTA Datasheet(HTML) 2 Page - Fairchild Semiconductor |
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2 / 8 page  2 Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity 1N50C FQN1N50C TO-92 -- -- 2000ea Electrical Characteristics T C = 25°C unless otherwise noted Symbol Parameter Test Conditions Min. Typ. Max. Unit Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 500 -- -- V ∆BVDSS/ ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.5 -- V/°C IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V -- -- 50 µA VDS = 400 V, TC = 125°C -- -- 250 µA IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.19 A -- 4.6 6.0 Ω gFS Forward Transconductance VDS = 40 V, ID = 0.19A (Note 4) -- 0.6 -- S Dynamic Characteristics Ciss Input Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 150 195 pF Coss Output Capacitance -- 28 40 pF Crss Reverse Transfer Capacitance -- 4.1 -- pF Switching Characteristics td(on) Turn-On Delay Time VDD = 250 V, ID = 1.0 A, RG = 25 Ω (Note 4, 5) -- 10 30 ns tr Turn-On Rise Time -- 10 30 ns td(off) Turn-Off Delay Time -- 20 50 ns tf Turn-Off Fall Time -- 15 40 ns Qg Total Gate Charge VDS = 400 V, ID = 1.0 A, VGS = 10 V (Note 4, 5) -- 4.9 6.4 nC Qgs Gate-Source Charge -- 0.66 -- nC Qgd Gate-Drain Charge -- 2.9 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 0.38 A ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 3.04 A VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.38 A -- -- 1.4 V trr Reverse Recovery Time VGS = 0 V, IS = 1.0 A, dIF / dt = 100 A/µs (Note 4) -- 188 -- ns Qrr Reverse Recovery Charge -- 0.55 -- µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 80mH, IAS = 1.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 0.38A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature 6. a) Reference point of the RθJL is the drain lead b) When mounted on 3”x4.5” FR-4 PCB without any pad copper in a still air environment (RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance. RθCA is determined by the user’s board design) www.fairchildsemi.com ©20 01 Fairchild Semiconductor Corporation FQN1N50C Rev. C0 |
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