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EP2C20Q240C8 Datasheet(PDF) 9 Page - Altera Corporation |
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EP2C20Q240C8 Datasheet(HTML) 9 Page - Altera Corporation |
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9 / 470 page  Altera Corporation ix Cyclone II Device Handbook, Volume 1 Contents Cyclone II Configuration Overview ................................................................................................. 13–1 Configuration File Format .................................................................................................................. 13–3 Configuration Data Compression ..................................................................................................... 13–3 Active Serial Configuration (Serial Configuration Devices) ......................................................... 13–6 Single Device AS Configuration ................................................................................................... 13–7 Multiple Device AS Configuration ............................................................................................ 13–12 Configuring Multiple Cyclone II Devices with the Same Design ......................................... 13–15 Estimating AS Configuration Time ........................................................................................... 13–18 Programming Serial Configuration Devices ............................................................................ 13–19 PS Configuration ................................................................................................................................ 13–22 Single Device PS Configuration Using a MAX II Device as an External Host .................... 13–22 Multiple Device PS Configuration Using a MAX II Device as an External Host ................ 13–26 PS Configuration Using a Microprocessor ............................................................................... 13–31 Single Device PS Configuration Using a Configuration Device ............................................ 13–32 Multiple Device PS Configuration Using a Configuration Device ....................................... 13–37 PS Configuration Using a Download Cable ............................................................................. 13–48 JTAG Configuration .......................................................................................................................... 13–53 Single Device JTAG Configuration ............................................................................................ 13–55 JTAG Configuration of Multiple Devices ................................................................................. 13–58 Jam STAPL .................................................................................................................................... 13–60 Configuring Cyclone II FPGAs with JRunner .......................................................................... 13–60 Combining JTAG & Active Serial Configuration Schemes .................................................... 13–61 Programming Serial Configuration Devices In-System Using the JTAG Interface ............ 13–61 Device Configuration Pins ............................................................................................................... 13–64 Conclusion .......................................................................................................................................... 13–70 Chapter 14. IEEE 1149.1 (JTAG) Boundary-Scan Testing for Cyclone II Devices Introduction .......................................................................................................................................... 14–1 IEEE Std. 1149.1 BST Architecture .................................................................................................... 14–2 IEEE Std. 1149.1 Boundary-Scan Register ........................................................................................ 14–4 Boundary-Scan Cells of a Cyclone II Device I/O Pin ............................................................... 14–4 IEEE Std. 1149.1 BST Operation Control .......................................................................................... 14–6 SAMPLE/PRELOAD Instruction Mode ..................................................................................... 14–9 Capture Phase ............................................................................................................................... 14–10 Shift & Update Phases ................................................................................................................. 14–10 EXTEST Instruction Mode .......................................................................................................... 14–11 Capture Phase ............................................................................................................................... 14–12 Shift & Update Phases ................................................................................................................. 14–12 BYPASS Instruction Mode .......................................................................................................... 14–13 IDCODE Instruction Mode ......................................................................................................... 14–14 USERCODE Instruction Mode ................................................................................................... 14–14 CLAMP Instruction Mode .......................................................................................................... 14–14 HIGHZ Instruction Mode ........................................................................................................... 14–15 I/O Voltage Support in JTAG Chain ......................................................................................... 14–15 Using IEEE Std. 1149.1 BST Circuitry ............................................................................................. 14–16 BST for Configured Devices ............................................................................................................. 14–17 Disabling IEEE Std. 1149.1 BST Circuitry ....................................................................................... 14–18 |
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