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TMS320C6204ZHK200 Datasheet(PDF) 2 Page - Texas Instruments |
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TMS320C6204ZHK200 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 95 page  TMS320C6204 FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS152C -- OCTOBER 2000 -- REVISED MARCH 2004 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251--1443 Table of Contents parameter measurement information 41 ............... input and output clocks 42 ........................... asynchronous memory timing 45 ..................... synchronous-burst memory timing 48 ................. synchronous DRAM timing 50 ....................... HOLD/HOLDA timing 54 ............................ reset timing 55 ..................................... external interrupt timing 57 .......................... expansion bus synchronous FIFO timing 58 ........... expansion bus asynchronous peripheral timing 60 ...... expansion bus synchronous host-port timing 63 ........ expansion bus asynchronous host-port timing 69 ....... XHOLD/XHOLDA timing 71 .......................... multichannel buffered serial port timing 73 ............. DMAC, timer, power-down timing 85 .................. JTAG test-port timing 87 ............................ revision history 88 .................................. thermal/mechanical data 89 ......................... GHK and GLW BGA packages (bottom view) 3 .......... description 4 ....................................... device characteristics 4 .............................. C62x device compatibility 6 ........................... functional and CPU (DSP core) block diagram 7 ......... CPU (DSP core) description 8 ........................ memory map summary 10 ............................ peripheral register descriptions 11 ..................... DMA channel synchronization events 16 ............... interrupt sources and interrupt selector 17 .............. signal groups description 18 .......................... signal descriptions 21 ................................ development support 31 ............................. documentation support 34 ............................ clock PLL 35 ....................................... power-down mode logic 36 ........................... power-supply sequencing 38 ......................... absolute maximum ratings over operating case temperature ranges 39 .......................... recommended operating conditions 39 ................. electrical characteristics over recommended ranges of supply voltage and operating case temperature 40 ............................ |
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