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EVAL-AD7091SDZ Datasheet(PDF) 11 Page - Analog Devices |
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EVAL-AD7091SDZ Datasheet(HTML) 11 Page - Analog Devices |
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11 / 20 page  Data Sheet AD7091 Rev. A | Page 11 of 20 TYPICAL CONNECTION DIAGRAM Figure 19 shows a typical connection diagram for the AD7091. A positive power supply in the range of 2.09 V to 5.25 V should be connected to the VDD pin. The reference is derived internally from VDD and, for this reason, VDD should be well decoupled to achieve the specified performance; typical values for the decoupling capacitors are 100 nF and 10 μF. The analog input range is 0 V to VDD. The typical value for the regulator bypass decoupling capacitor (REGCAP) is 1 μF. The conversion result is output in a 12-bit word with the MSB first. Alternatively, because the supply current required by the AD7091 is so low, a precision reference can be used as the supply source to the part. A reference from the REF19x or ADR34xx voltage reference family (REF195 or ADR3450 for 5 V, and REF193 or ADR3430 for 3 V) can be used to supply the required voltage to the ADC. This configuration is especially useful if the power supply is quite noisy, or if the system supply voltages are at some value other than 5 V or 3 V, such as 15 V. If the busy indicator function is required, connect a pull-up resistor of typically 100 kΩ to VDD to the SDO pin (see Figure 19). In addition, for applications in which power consumption is a concern, the power-down mode can be used to improve the power performance of the ADC (see the Modes of Operation section for more information). ANALOG INPUT Figure 18 shows an equivalent circuit of the AD7091 analog input structure. The D1 and D2 diodes provide ESD protection for the analog input. To prevent the diodes from becoming forward-biased and conducting current, ensure that the analog input signal never exceeds VDD by more than 300 mV. These diodes can conduct a maximum of 10 mA without causing irreversible damage to the part. D1 D2 R1 C2 3.6pF VDD VIN C1 1pF C3 2.5pF NOTES 1. DURING THE CONVERSION PHASE, THE SWITCH IS OPEN. DURING THE TRACK PHASE, THE SWITCH IS CLOSED. Figure 18. Equivalent Analog Input Circuit Capacitor C1 in Figure 18 is typically about 1 pF and can primarily be attributed to pin capacitance. Resistor R1 is a lumped component made up of the on resistance of a switch. This resistor is typically about 500 Ω. Capacitor C2 is the ADC sampling capacitor and typically has a capacitance of 3.6 pF. In applications where harmonic distortion and signal-to-noise ratio (SNR) are critical, the analog input should be driven from a low impedance source. Large source impedances significantly affect the ac performance of the ADC and may necessitate the use of an input buffer amplifier, as shown in Figure 19. The choice of the op amp is a function of the particular application. When no amplifier is used to drive the analog input, the source impedance should be limited to low values. The maximum source impedance depends on the amount of total harmonic distortion (THD) that can be tolerated. The THD increases as the source impedance increases and performance degrades. Figure 9 shows a graph of THD vs. source impedance when using a supply voltage of 3 V and a sampling rate of 1 MSPS. To achieve the specified performance, use an external filter—such as the one-pole, low-pass RC filter shown in Figure 19—on the analog input connected to the AD7091. AD7091 VIN GND CONVST SDO VDD CS SCLK REGCAP MICROPROCESSOR/ MICROCONTROLLER/ DSP 10μF 100nF 1μF 100kΩ WITH BUSY INDICATOR ANALOG INPUT VDD VDD 51Ω 4.7nF (2.09V to 5.25V) Figure 19. Typical Connection Diagram |
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