S26GL01GS10GFIV10 datasheet(7/104 Pages) SPANSION

Part #	S26GL01GS10GFIV10

Description	GL-S MirrorBit Eclipse Flash Non-Volatile Memory Fam

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Manufacturer	SPANSION [SPANSION]

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7 / 104 page

December 21, 2012 S29GL_128S_01GS_00_07

GL-S MirrorBit® Family

7

Data

She e t

Figures

Figure 1.1

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 3.1

Advanced Sector Protection Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 5.1

Word Program Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 5.2

Write Buffer Programming Operation with Data Polling Status . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 5.3

Write Buffer Programming Operation with Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 5.4

Sector Erase Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 5.5

Data# Polling Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 5.6

Toggle Bit Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 9.1

Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Figure 9.2

Power-down and Voltage Drop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Figure 9.3

Maximum Negative Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Figure 9.4

Maximum Positive Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Figure 10.1

Test Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Figure 10.2

Input Waveforms and Measurement Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Figure 10.3

Power-Up Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Figure 10.4

Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Figure 10.5

Back to Back Read (tACC) Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Figure 10.6

Back to Back Read Operation (tRC)Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Figure 10.7

Page Read Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Figure 10.8

Back to Back Write Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Figure 10.9

Back to Back (CE#VIL) Write Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Figure 10.10 Write to Read (tACC) Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Figure 10.11 Write to Read (tCE) Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Figure 10.12 Read to Write (CE# VIL) Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Figure 10.13 Read to Write (CE# Toggle) Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Figure 10.14 Program Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Figure 10.15 Chip/Sector Erase Operation Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Figure 10.16 Data# Polling Timing Diagram (During Embedded Algorithms) . . . . . . . . . . . . . . . . . . . . . . . 88

Figure 10.17 Toggle Bit Timing Diagram (During Embedded Algorithms) . . . . . . . . . . . . . . . . . . . . . . . . . 88

Figure 10.18 DQ2 vs. DQ6 Relationship Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Figure 10.19 Back to Back (CE#) Write Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Figure 10.20 (CE#) Write to Read Operation Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Figure 11.1

56-Pin Standard TSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Figure 11.2

56-Pin Thin Small Outline Package (TSOP), 14 x 20 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

Figure 11.3

64-ball Fortified Ball Grid Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

Figure 11.4

LAE064—64-ball Fortified Ball Grid Array (FBGA), 9 x 9 mm . . . . . . . . . . . . . . . . . . . . . . . . 94

Figure 11.5

56-ball Fortified Ball Grid Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

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