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ADuCM361BCPZ128 Datasheet(PDF) 6 Page - Analog Devices |
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ADuCM361BCPZ128 Datasheet(HTML) 6 Page - Analog Devices |
6 / 24 page ADuCM360/ADuCM361 Data Sheet Rev. B | Page 6 of 24 SPECIFICATIONS MICROCONTROLLER ELECTRICAL SPECIFICATIONS AVDD/IOVDD = 1.8 V to 3.6 V, internal 1.2 V reference, fCORE = 16 MHz, all specifications at TA = −40°C to +125°C, unless otherwise noted. Table 1. Parameter Test Conditions/Comments Min Typ Max Unit ADC SPECIFICATIONS ADC0 and ADC1 Conversion Rate1 Chop off 3.5 3906 Hz Chop on 3.5 1302 Hz No Missing Codes1 Chop off, fADC ≤ 500 Hz 24 Bits Chop on, fADC ≤ 250 Hz 24 Bits RMS Noise and Data Output Rates See Table 2 through Table 9 Integral Nonlinearity1 Gain = 1, input buffer off ±10 ppm of FSR Gain = 2, 4, 8, or 16 ±15 ppm of FSR Gain = 32, 64, or 128 ±20 ppm of FSR Offset Error2, 3, 4, 6, 7 Chop off; offset error is in the order of the noise for the programmed gain and update rate following calibration ±100/gain μV Chop on1 ±1.0 μV Offset Error Drift vs. Temperature1, 4, 6 Chop off, gain ≤ 4 1/gain μV/°C Chop off, gain ≥ 8 230 nV/°C Chop on 10 nV/°C Offset Error Lifetime Stability5 Gain = 128 1 μV/1000Hr Full-Scale Error1, 4, 6, 7, 8 ±0.5/gain mV Full-Scale Error Lifetime Stability5 Gain = 128 70 μV/1000Hr Gain Error Drift vs. Temperature1, 4, 6 External reference Gain = 1, 2, 4, 8, or 16 ±3 ppm/°C Gain = 32, 64, or 128 ±6 ppm/°C PGA Gain Mismatch Error ±0.15 % Power Supply Rejection1 External reference Chop on, ADC input = 0.25 V, gain = 4 95 dB Chop off, ADC input = 7.8 mV, gain = 128 80 dB Chop off, ADC input = 1 V, gain = 1 90 dB Absolute Input Voltage Range Unbuffered Mode AGND AVDD V Buffered Mode Gain = 1 is not available; see the infor- mation about silicon anomalies on the ADuCM360/ADuCM361 product page Gain ≥ 2 AGND + 0.1 AVDD − 0.1 V Differential Input Voltage Ranges1 For gain = 32, 64, and 128, see Table 3 and Table 7 for allowable input ranges and noise values Gain = 1 ±VREF V Gain = 2 ±500 mV Gain = 4 ±250 mV Gain = 8 ±125 mV Gain = 16 ±62.5 mV Common-Mode Voltage, VCM1 Ideally, VCM = ((AIN+) + (AIN−))/2; gain = 2 to 128; input current varies with VCM (see Figure 9 and Figure 10) AGND AVDD V Input Current9 Buffered Mode Gain > 1 (excluding AIN4, AIN5, AIN6, and AIN7 pins) 1 nA Gain > 1 (AIN4, AIN5, AIN6, and AIN7 pins) 2 nA Unbuffered Mode Input current varies with input voltage 500 nA/V |
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