74LVC1G126

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© NXP B.V. 2012. All rights reserved.

Product data sheet

Rev. 12 — 2 July 2012

2 of 21

NXP Semiconductors

74LVC1G126

Bus buffer/line driver; 3-state

3.

Ordering information

4.

Marking

[1]

The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5.

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC1G126GW

40 Cto+125 C

TSSOP5

plastic thin shrink small outline package;

5 leads; body width 1.25 mm

SOT353-1

74LVC1G126GV

40 Cto+125 C

SC-74A

plastic surface-mounted package; 5 leads

SOT753

74LVC1G126GM

40 Cto+125 C

XSON6

plastic extremely thin small outline package;

no leads; 6 terminals; body 1

 1.45  0.5 mm

SOT886

74LVC1G126GF

40 C to +125 C

XSON6

plastic extremely thin small outline package;

no leads; 6 terminals; body 1

 1  0.5 mm

SOT891

74LVC1G126GN

40 C to +125 C

XSON6

extremely thin small outline package; no leads;

6 terminals; body 0.9

 1.0  0.35 mm

SOT1115

74LVC1G126GS

40 C to +125 C

XSON6

extremely thin small outline package; no leads;

6 terminals; body 1.0

 1.0  0.35 mm

SOT1202

74LVC1G126GX

40 C to +125 C

X2SON5

X2SON5: plastic thermal enhanced extremely

thin small outline package; no leads; 5

terminals; body 0.8

 0.8  0.35 mm

SOT1226

Table 2.

Marking codes

Type number

Marking[1]

74LVC1G126GW

VN

74LVC1G126GV

V26

74LVC1G126GM

VN

74LVC1G126GF

VN

74LVC1G126GN

VN

74LVC1G126GS

VN

74LVC1G126GX

VN

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram

mna125

A

OE

Y

2

1

4

mna126

1

4

OE

2

mna127

OE

A

Y