LPC11C14FB301 datasheet(7/62 Pages) NXP

Part #	LPC11C14FB301

Description	32-bit ARM Cortex-M0 microcontroller; 16/32 kB flash, 8 kB SRAM; C_CAN

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Manufacturer	NXP [NXP Semiconductors]

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LPC11CX2_CX4

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Product data sheet

Rev. 3.1 — 15 May 2013

7 of 62

NXP Semiconductors

LPC11Cx2/Cx4

32-bit ARM Cortex-M0 microcontroller

6.2 Pin description

Table 3.

LPC11C12/C14 pin description table

Symbol

Start

logic

inputs

Type

Reset

state

[1]

Description

PIO0_0 to PIO0_11

Port 0 — Port 0 is a 12-bit I/O port with individual direction and

function controls for each bit. The operation of port 0 pins depends

on the function selected through the IOCONFIG register block.

RESET/PIO0_0

3[2]

yes

I

I; PU

RESET — External reset input with 20 ns glitch filter. A LOW-going

pulse as short as 50 ns on this pin resets the device, causing I/O

ports and peripherals to take on their default states, and processor

execution to begin at address 0.

I/O

-

PIO0_0 — General purpose digital input/output pin with 10 ns glitch

filter.

PIO0_1/CLKOUT/

CT32B0_MAT2

4[3]

yes

I/O

I; PU

PIO0_1 — General purpose digital input/output pin. A LOW level on

this pin during reset starts the flash ISP command handler via UART

(if PIO0_3 is HIGH) or via C_CAN (if PIO0_3 is LOW).

O-

CLKOUT — Clockout pin.

O-

CT32B0_MAT2 — Match output 2 for 32-bit timer 0.

PIO0_2/SSEL0/

CT16B0_CAP0

10[3]

yes

I/O

I; PU

PIO0_2 — General purpose digital input/output pin.

I/O

-

SSEL0 — Slave Select for SPI0.

I-

CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.

PIO0_3

14[3]

yes

I/O

I; PU

PIO0_3 — General purpose digital input/output pin. This pin is

monitored during reset: Together with a LOW level on pin PIO0_1, a

LOW level starts the flash ISP command handler via C_CAN and a

HIGH level starts the flash ISP command handler via UART.

PIO0_4/SCL

15[4]

yes

I/O

I; IA

PIO0_4 — General purpose digital input/output pin (open-drain).

I/O

-

SCL — I2C-bus, open-drain clock input/output. High-current sink only

if I2C Fast-mode Plus is selected in the I/O configuration register.

PIO0_5/SDA

16[4]

yes

I/O

I; IA

PIO0_5 — General purpose digital input/output pin (open-drain).

I/O

-

SDA — I2C-bus, open-drain data input/output. High-current sink only

if I2C Fast-mode Plus is selected in the I/O configuration register.

PIO0_6/SCK0

22[3]

yes

I/O

I; PU

PIO0_6 — General purpose digital input/output pin.

I/O

-

SCK0 — Serial clock for SPI0.

PIO0_7/CTS

23[3]

yes

I/O

I; PU

PIO0_7 — General purpose digital input/output pin (high-current

output driver).

I-

CTS — Clear To Send input for UART.

PIO0_8/MISO0/

CT16B0_MAT0

27[3]

yes

I/O

I; PU

PIO0_8 — General purpose digital input/output pin.

I/O

-

MISO0 — Master In Slave Out for SPI0.

O-

CT16B0_MAT0 — Match output 0 for 16-bit timer 0.

PIO0_9/MOSI0/

CT16B0_MAT1

28[3]

yes

I/O

I; PU

PIO0_9 — General purpose digital input/output pin.

I/O

-

MOSI0 — Master Out Slave In for SPI0.

O-

CT16B0_MAT1 — Match output 1 for 16-bit timer 0.

SWCLK/PIO0_10/

SCK0/

CT16B0_MAT2

29[3]

yes

I

I; PU

SWCLK — Serial wire clock.

I/O

-

PIO0_10 — General purpose digital input/output pin.

I/O

-

SCK0 — Serial clock for SPI0.

O-

CT16B0_MAT2 — Match output 2 for 16-bit timer 0.

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