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BD4726G-TR Datasheet(PDF) 8 Page - Rohm |
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BD4726G-TR Datasheet(HTML) 8 Page - Rohm |
8 / 13 page Datasheet 8/10 BD47xx series TSZ02201-0R7R0G300020-1-2 © 2013 ROHM Co., Ltd. All rights reserved. 22.May.2013 Rev.006 www.rohm.com TSZ22111 ・ 15 ・ 001 ● Application Information Explanation of Operation BD47xx series has threshold voltages namely the detection voltage and release voltage. As the voltages applied to the input reach their respective thresholds, the output switches from “High” to “Low” and from “Low” to “High”. The release voltage has a hysteresis that is the value of the detection voltage +50mV (Typ.), preventing chattering in the output. When the input is greater than the release voltage, the output is in a “High” state. When the input decreases from that state, the output switches to “Low” upon reaching the detection voltage. When the input is less than the detection voltage, the output is in a “Low” state. When the input increases from that state, the output switches to “High” upon reaching the release voltage. Additionally, at least 0.85V input voltage is required for the circuit to function as expected. When the input falls below the operating limit voltage, the output becomes unstable. 1 When the power supply is turned on, the output is still unstable until it reaches the operating limit voltage (VOPL) with a given time tPHL. Therefore it is possible that the reset signal is not outputted when the rise time of VDD is faster than tPHL. 2 When VDD is greater than VOPL but less than the reset release voltage (VDET+∆VDET), the output voltages will switch to Low. 3 If VDD exceeds the reset release voltage (VDET+∆VDET) then VOUT switches from L to H. 4 If VDD drops below the detection voltage (VDET) when the power supply is powered down or when there is a power supply fluctuation, VOUT switches to L (with a delay of tPHL). 5 The potential difference between the detection voltage and the release voltage is known as the Hysteresis Width (∆VDET). The system is designed such that, the output does not toggle with power supply fluctuations within this hysteresis width, malfunctions due to noise are prevented. <Precautions> Please be aware that when there is resistance on the power supply line, the detection voltage varies with voltage drops caused by the IC current consumption. Please connect a capacitor between VDD and GND when the power supply line has high impedance. Fig.11 Timing Waveform VDD VDET+ Δ VDET VDET VOPL 0V tPHL ① ② VOUT tPLH tPHL tPLH ③ ④ VOL VOH VDD ⑤ |
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