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ACPL-K64L Datasheet(PDF) 9 Page - AVAGO TECHNOLOGIES LIMITED

Part # ACPL-K64L
Description  Ultra Low Power 10 MBd Digital CMOS Optocouplers
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Manufacturer  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Direct Link  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

ACPL-K64L Datasheet(HTML) 9 Page - AVAGO TECHNOLOGIES LIMITED

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9
Package Characteristics
All typicals are at TA = 25°C.
Parameter
Symbol
Part Number
Min
Typ
Max
Units
Test Conditions
Input-Output Insulation
VISO
ACPL-061L^
ACPL-064L
ACPL-M61L
3750
Vrms
RH < 50% for 1 min.
TA = 25°C
ACPL-W61L
ACPL-K64L
5000
Input-Output Resistance
RI-O
1012
:
VI-O = 500 V
Input-Output Capacitance
CI-O
0.6
pF
f = 1 MHz, TA = 25°C
^ Advanced information, may subject to changes.
Notes:
1. tPHL propagation delay is measured from the 50% (Vin or IF) on the rising edge of the input pulse to the 50% VDD of the falling edge of the VO signal.
tPLH propagation delay is measured from the 50% (Vin or IF) on the falling edge of the input pulse to the 50% level of the rising edge of the VO
signal.
2. PWD is defined as |tPHL - tPLH|.
3. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature within the
recommended operating conditions.
4. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state.
5. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state.
6. CMD is the maximum tolerable rate of the common mode voltage during data transmission to assure that the absolute increase of the PWD is less
than 10 ns.


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