MC333905D datasheet(6/766 Pages) FREESCALE

Part #	MC333905D

Description	SBC Gen2 with CAN High Speed and LIN Interface

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

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Freescale Semiconductor

2.2.9 Status Register (SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

2.2.10 Memory Base Address Registers (RAMBAR, FLASHBAR) . . . . . . . . . . . . . . . 2-8

2.3

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

2.3.1 Version 2 ColdFire Microarchitecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

2.3.2 Instruction Set Architecture (ISA_A+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14

2.3.3 Exception Processing Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15

2.3.3.1 Exception Stack Frame Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17

2.3.4 Processor Exceptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18

2.3.4.1 Access Error Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18

2.3.4.2 Address Error Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19

2.3.4.3 Illegal Instruction Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19

2.3.4.4 Divide-By-Zero . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20

2.3.4.5 Privilege Violation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20

2.3.4.6 Trace Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20

2.3.4.7 Unimplemented Line-A Opcode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21

2.3.4.8 Unimplemented Line-F Opcode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21

2.3.4.9 Debug Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21

2.3.4.10 RTE and Format Error Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21

2.3.4.11 TRAP Instruction Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22

2.3.4.12 Unsupported Instruction Exception . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22

2.3.4.13 Interrupt Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22

2.3.4.14 Fault-on-Fault Halt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22

2.3.4.15 Reset Exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22

2.3.5 Instruction Execution Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2.3.5.1 Timing Assumptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26

2.3.5.2 MOVE Instruction Execution Times . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26

2.3.5.3 Standard One Operand Instruction Execution Times . . . . . . . . . . . . . 2-28

2.3.5.4 Standard Two Operand Instruction Execution Times . . . . . . . . . . . . . 2-28

2.3.5.5 Miscellaneous Instruction Execution Times . . . . . . . . . . . . . . . . . . . . 2-30

2.3.5.6 EMAC Instruction Execution Times . . . . . . . . . . . . . . . . . . . . . . . . . . 2-31

2.3.5.7 Branch Instruction Execution Times . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32

Chapter 3

Enhanced Multiply-Accumulate Unit (EMAC)

3.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.1.1.1 Introduction to the MAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

3.2

Memory Map/Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3

3.2.1 MAC Status Register (MACSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3

3.2.2 Mask Register (MASK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5

3.2.3 Accumulator Registers (ACC0–3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6

3.2.4 Accumulator Extension Registers (ACCext01, ACCext23) . . . . . . . . . . . . . . . . 3-7

3.3

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8

3.3.1 Fractional Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10

3.3.1.1 Rounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10

MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3

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