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FW82546GB Datasheet(PDF) 11 Page - Intel Corporation |
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FW82546GB Datasheet(HTML) 11 Page - Intel Corporation |
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11 / 54 page  Networking Silicon — 82546GB Datasheet 5 2.0 Additional 82546GB Features 2.1 PCI 2.2 MAC 2.3 PHY Feature Benefits Algorithms that optimally use advanced PCI, MWI, MRM, and MRL commands as well as PCI-X MRD, MRB, and MWB commands • Efficient bus operations Features Benefits Low-latency transmit and receive queues • Network packets handled without waiting or buffer overflow. Caches up to 64 packet descriptors in a single burst • Efficient use of PCI bandwidth Descriptor ring management hardware for transmit and receive • Simple software programming model Mechanism available for reducing interrupts generated by transmit and receive operations • Maximizes system performance and throughput Support for transmission and reception of packets up to 16 Kbytes • Enables jumbo frames Feature Benefits State-of-the-art DSP architecture implements digital adaptive equalization, echo cancellation, and cross- talk cancellation • Robust performance in noisy environments • Tolerance of common electrical signal impairments |
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