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LU82541PI Datasheet(PDF) 11 Page - Intel Corporation |
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LU82541PI Datasheet(HTML) 11 Page - Intel Corporation |
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11 / 46 page  Networking Silicon — 82541(PI/GI/EI) 11 3.0 Signal Descriptions 3.1 Signal Type Definitions The signals of the 82541(PI/GI/EI) controller are electrically defined as follows: 3.2 PCI Bus Interface Signals (56) When the Reset signal (RST#) is asserted, the 82541(PI/GI/EI) will not drive any PCI output or bi- directional pins. The Power Management Event signal (PME#) can be active by configuring manageability functions. Name Definition I Input. Standard input only digital signal. O Output. Standard output only digital signal. TS Tri-state. Bi-directional tri-state digital input/output signal. STS Sustained Tri-state. An active low tri-state signal owned and driven by only one agent at a time. The agent that drives an STS pin low must drive it high for at least one clock before letting it float. A new agent cannot start driving an STS signal any sooner than one clock after the previous owner tri-states it. A pull-up resistor is required to sustain the inactive state until another agent drives it, and must be provided by the central resource. OD Open Drain. Wired-OR with other agents. The signaling agent asserts the OD signal, but the signal is returned to the inactive state by a weak pull-up resistor. The pull-up resistor may require two or three clock periods to fully restore the signal to the de-asserted state. A Analog. PHY analog data signal. P Power. Power connection, voltage reference, or other reference connection. |
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