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SIC403 Datasheet(PDF) 10 Page - Vishay Siliconix

Part # SIC403
Description  microBUCK SiC403 6 A, 28 V Integrated Buck Regulator with Programmable LDO
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Manufacturer  VISHAY [Vishay Siliconix]
Direct Link  http://www.vishay.com
Logo VISHAY - Vishay Siliconix

SIC403 Datasheet(HTML) 10 Page - Vishay Siliconix

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10
Document Number: 66550
S12-0628-Rev. C, 19-Mar-12
Vishay Siliconix
SiC403
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical support, please contact: analogswitchtechsupport@vishay.com
APPLICATIONS INFORMATION
SiC403 Synchronous Buck Converter
The SiC403 is a step down synchronous buck DC/DC
converter with integrated power FETs and programmable
LDO. The SiC403 is capable of 6 A operation at very high
efficiency in a tiny 5 mm x 5 mm - 32 pin package. The
programmable operating frequency range of 200 kHz to
1 MHz, enables the user to optimize the solution for minimum
board space and optimum efficiency.
The
buck
controller
employs
pseudo-fixed
frequency
adaptive on-time control. This control scheme allows fast
transient response thereby lowering the size of the power
components used in the system.
Input Voltage Range
The SiC403 requires two input supplies for normal operation:
VIN and VDD. VIN operates over the wide range from 3 V to
28 V. VDD requires a supply voltage between 3 V to 5 V that
can be an external source or the internal LDO configured
from VIN.
Power Up Sequence
The SIC403 initiates a start up when VIN, VDD, and EN/PSV
pins are above the applicable thresholds. When using an
external bias supply for the VDD voltage, it is recommended
that the VDD is applied to the device only after the VIN voltage
is present because VDD cannot exceed VIN at any time. A 10
resistor must be placed between the external VDD supply and
the VDD pin to avoid damage to the device during power-up
and or shutdown situations where VDD could exceed VIN
unexpectedly.
Shut-Down
The SIC403 can be shut-down by pulling either VDD or
EN/PSV pin below its threshold. When using an external
supply voltage for VDD, the VDD pin must be deactivated
while the VIN voltage is still present. A 10 resistor must be
placed between the external VDD supply and the VDD pin to
avoid damage to the device.
When the VDD pin is active and EN/PSV is at low logic level,
the output voltage discharges through an internal FET.
Pseudo-Fixed Frequency Adaptive On-Time Control
The PWM control method used for the SiC403 is
pseudo-fixed frequency, adaptive on-time, as shown in
figure 1. The ripple voltage generated at the output capacitor
ESR is used as a PWM ramp signal. This ripple is used to
trigger the on-time of the controller.
The adaptive on-time is determined by an internal oneshot
timer. When the one-shot is triggered by the output ripple, the
device sends a single on-time pulse to the highside
MOSFET. The pulse period is determined by VOUT and VIN;
the period is proportional to output voltage and inversely
proportional to input voltage. With this adaptive on-time
arrangement, the device automatically anticipates the
on-time needed to regulate VOUT for the present VIN
condition and at the selected frequency.
The adaptive on-time control has significant advantages over
traditional control methods used in the controllers today.
• Reduced component count by eliminating DCR sense or
current sense resistor as no need of a sensing inductor
current.
• Reduced
saves
external
components
used
for
compensation by eliminating the no error amplifier and
other components.
• Ultra fast transient response because of fast loop,
absence of error amplifier speeds up the transient
response.
• Predictable frequency spread because of constant on-time
architecture.
• Fast transient response enables operation with minimum
output capacitance
Overall, superior performance compared to fixed frequency
architectures.
On-Time One-Shot Generator (tON) and Operating
Frequency
The SiC403 have an internal on-time one-shot generator
which is a comparator that has two inputs. The FB
Comparator output goes high when VFB is less than the
internal 750 mV reference. This feeds into the gate drive and
turns on the high-side MOSFET, and also starts the one-shot
timer. The one-shot timer uses an internal comparator and a
capacitor. One comparator input is connected to VOUT, the
other input is connected to the capacitor. When the on-time
begins, the internal capacitor charges from zero volts
through a current which is proportional to VIN. When the
capacitor voltage reaches VOUT, the on-time is completed
and the high-side MOSFET turns off. The figure 2 shows the
on-chip implementation of on-time generation.
Figure 1 - Output Ripple and PWM Control Method
VIN
CIN
VLX
Q1
Q2
L
ESR
+
FB
VLX
tON
VFB
COUT
VOUT
FB threshold


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