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CHL8505CRT Datasheet(PDF) 5 Page - International Rectifier |
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CHL8505CRT Datasheet(HTML) 5 Page - International Rectifier |
5 / 15 page High‐Efficiency 5V MOSFET Gate Driver CHL8505 December 6, 2011 | FINAL | V1.05 5 PIN DESCRIPTIONS PIN# PIN NAME PIN DESCRIPTION 1 PWM The PWM signal is the control input for the driver from a 1.8V IR ATL‐based PWM signal. Connect this pin to the PWM output of the controller. 2 VCC Connect this pin to a +5V bias supply. Place a high quality low ESR ceramic capacitor from this pin to GND. 3 VDRV Connect this pin to a separate supply voltage between 4.0V and 13.2V to vary the drive voltage on the low‐side MOSFETs. Place a high quality low ESR ceramic capacitor from this pin to GND. 4 NC Leave this pin floating. 5 BOOT Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the SWITCH pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value. 6 HI_GATE Upper gate drive output. Connect to gate of high‐side power N‐Channel MOSFET. 7 SWITCH Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET. This pin provides a return path for the upper gate drive 8 LO_GATE Lower gate drive output. Connect to gate of the low‐side power N‐Channel MOSFET. 9 NC Leave this pin floating. 10 NC Leave this pin floating. PAD (11) GND Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the driver. |
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