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5AGXFA3D631I3ES Datasheet(PDF) 6 Page - Altera Corporation |
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5AGXFA3D631I3ES Datasheet(HTML) 6 Page - Altera Corporation |
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6 / 37 page  Maximum Resources Table 4: Maximum Resource Counts for Arria V GX Devices—Preliminary Member Code Resource B7 B5 B3 B1 A7 A5 A3 A1 504 420 362 300 242 190 156 75 Logic Elements (LE) (K) 190,240 158,491 136,880 113,208 91,680 71,698 58,900 28,302 ALM 760,960 633,964 547,520 452,832 366,720 286,792 235,600 113,208 Register 24,140 20,540 17,260 15,100 13,660 11,800 10,510 8,000 M10K Memory (Kb) 2,906 2,532 2,098 1,852 1,448 1,173 961 463 MLAB 1,156 1,092 1,045 920 800 600 396 240 Variable-precision DSP Block 2,312 2,184 2,090 1,840 1,600 1,200 792 480 18 x 18 Multiplier 16 16 12 12 12 12 10 10 PLL 2 36 36 24 24 24 24 9 9 6 Gbps Transceiver 704 704 704 704 544 544 416 416 GPIO 3 160 160 160 160 120 120 68 68 Transmitter LVDS 176 176 176 176 136 136 80 80 Receiver 2 2 2 2 2 2 1 1 PCIe Hard IP Block 4 4 4 4 4 4 2 2 Hard Memory Controller Related Information High-Speed Differential I/O Interfaces and DPA in Arria V Devices chapter, Arria V Device Handbook Provides the number of LVDS channels in each device package. 2 The number of PLLs includes general-purpose fractional PLLs and transceiver fractional PLLs. 3 The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os includes transceiver I/Os. Arria V Device Overview Altera Corporation Feedback AV-51001 Maximum Resources 6 2013.05.06 |
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