HI-3596, HI-3597, HI-3598, HI-3599

HOLT INTEGRATED CIRCUITS

4

Table 2. DefinedInstructions

ARINC

Channel

OP CODE

Hex

DATA

FIELD

Description

X

0h

None

Instruction not implemented. No operation.

1h - 8h

1h

128 bits

Loadlabelvaluestolabelmemory.Thedatafieldconsistsof16,8-bitlabels.

If fewer than 16 labels are needed for the application, the memory must be

padded with redundant (duplicate) label values.

1h - 8h

2h

128 bits Read the contents of the label memory for this channel.

1h - 8h

3h

32 bits

Read an ARINC word from the receive FIFO for this channel. If the FIFO is

empty all zeros will be read.

1h - 8h

4h

16 bits

Loadthespecifiedchannel’sControlRegisterandclearthatchannel’sFIFO.

1h - 8h

5h

16 bits

Readthespecifiedchannel’sControlRegister.

X

6h

16 bits

Read the Status Register.

X

7h

None

Master Reset (All channels).

X

8h

32 bits

Load the Transmit Register (High-speed data rate). This can also be used as

atestwordforeachreceiver(Loopbackself-test).

X

9h

32 bits

Load the Transmit Register (Low-speed data rate). This can also be used

asatestwordforeachreceiver(Loopbackself-test).

X

Ah - Fh

None

Instruction not implemented. No operation.

INSTRUCTIONS

Instruction op codes are used to read, write and con-

figure the HI-359x devices.The instruction format is

illustrated in Figure 2. When CS goes low, the next 8

clocksattheSCKpinshiftaninstructionopcodeinto

thedecoder,startingwiththefirstrisingedge.Theop

codeisfedintotheSIpin,mostsignificantbitfirst.

Forwriteinstructions,themostsignificantbitofthedata

word must immediately follow the instruction op code

andisclockedintoitsregisteronthenextrisingSCK

edge. Data word length varies depending on word type

written: 16-bit Control Register writes, 32-bit transmit

register writes or 128-bit writes to a channel’s label-

matching enable/disable memory.

For read instructions, the most significant bit of the

requested data word appears at the SO pin after the last

opcodebitisclockedintothedecoder,atthenextfall-

ing SCK edge. As in write instructions, the data field

bit-length varies with read instruction type.

Channel-specificinstructionsusetheupperfourbitsto

specify an ARINC 429 receiver channel, 1-8 hex. The

lower four bits specify the op code, described in Table

2.Thefourchannelassignmentbitsare“don’tcare”for

instructionsthatarenotchannel-specific,suchasMas-

ter Reset.

Example:

One SPI Instruction

op code 14 hex

data field 0232 hex

MSB

LSB MSB

LSB

CS

SCK

SI

SPI INSTRUCTION FORMAT

7 6 5 4 3 2 1 0

MSB

LSB

ARINC 429

Channel

OP Code

ie: Load channel 1 control register with 0232 hex

Figure 2. SPI Instruction Format