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HI-8589PQI-10 Datasheet(PDF) 1 Page - Holt Integrated Circuits

Part # HI-8589PQI-10
Description  ARINC 429 Transmitter with Line Driver and Dual Receivers
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Manufacturer  HOLTIC [Holt Integrated Circuits]
Direct Link  http://www.holtic.com
Logo HOLTIC - Holt Integrated Circuits

HI-8589PQI-10 Datasheet(HTML) 1 Page - Holt Integrated Circuits

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PIN CONFIGURATION (Top View)
GENERAL DESCRIPTION
The HI-8581 and HI-8589 from Holt Integrated Circuits are
silicon gate CMOS devices for interfacing a 16-bit parallel
data bus directly to the ARINC 429 serial bus.
Both
devices provide two receivers, an independent transmitter
and line driver capability in a single package. The receiver
input circuitry and logic are designed to meet the
ARINC 429 specifications for loading, level detection,
timing, and protocol. The transmitter section provides the
ARINC 429 communication protocol and the line driver
circuits provide the ARINC 429 output levels.
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
or interrogating the receivers.
The data bus interfaces
with CMOS and TTL.
The HI-8581 has 37.5 ohms in series with each line driver
output. The HI-8589 provides the option to bypass most of
the internal output resistance so that external series
resistance may be added for lighting protection and still
match the 75 ohm characteristic impedance of the ARINC
bus.
Each independent receiver monitors the data stream with
a sampling rate 10 times the data rate. The sampling rate
is software selectable at either 1MHz or 125KHz.
The
results of a parity check are available as the 32nd ARINC
bit. The HI-8581 and HI-8589 examine the null and data
timings and will reject erroneous patterns. For example,
with a 125 KHz clock selection, the data frequency must
be between 10.4 KHz and 15.6 KHz.
The transmitter has a First In, First Out (FIFO) memory to
store 8 ARINC words for transmission.
The data rate of
the transmitter is software selectable by dividing the
master clock, CLK, by either 10 or 80. The master clock is
used to set the timing of the ARINC transmission within the
required resolution.
APPLICATIONS
• Avionics data communication
• Serial to parallel conversion
• Parallel to serial conversion
August 2013
44-Pin Plastic Quad Flat Pack (PQFP)
33 -
32 - N/C
31-V+
30 - TXB(OUT)
29 - TXA(OUT)
28-V-
27 - GND
26 - TX/R
25 -
24 -
23 -
ENTX
BD00
PL2
PL1
429DI2(B) - 1
-2
-3
SEL - 4
-5
-6
BD15 - 7
BD14 - 8
BD13 - 9
BD12 - 10
BD11 - 11
D/R1
D/R2
EN1
EN2
HI-8581PQI
HI-8589PQI
&
HI-8581PQT
HI-8589PQT
(See page 12 for additional pin configurations)
(DS8581 Rev. J)
08/13
HI-8581, HI-8589
ARINC 429
Transmitter with Line Driver and Dual Receivers
FEATURES
• ARINC specification 429 compliant
• 16-Bit parallel data bus
• Timing control 10 times the data rate
• Selectable data clocks
• Parity functions
• Low power
• Industrial & extended temperature ranges
• Direct receiver and transmitter interface to ARINC
bus in a single device
Receiver error rejection per ARINC 429 standard
Automatic transmitter data timing
• Self test mode
HOLT INTEGRATED CIRCUITS www.holtic.com


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