REGISTER DESCRIPTIONS

HOLT INTEGRATED CIRCUITS

6

HI-8436

TABLE 3.

7-2

-

1

SRST

0

TEST

Bit

Name

R/W Default

Description

R/W

0

Not Used.

R/W

0

Software Reset - Setting this bit to “1” holds all other registers and the TEST bit to their reset

values. SRST bit must be written back to “0” to release this reset

R/W

0

Setting this bit to “1” puts the HI-8436 in the self test mode. Input to sensors are internally set

according to the value of the TEST MODE DATA register

76543210

MSB

LSB

CONTROL REGISTER : CTRL

Read: SPI Op-code 0x82

Write: SPI Op-code 0x02

Reset Value 00

[Opcode, DB0]

X X XXX X

TABLE 4.

7-4

-

R/W

0

3-0

BANK3-0

Bit

Name

R/W Default

Description

Not Used.

R/W

0

Program Sensor type for SENSE Inputs.

Bank 0 programs inputs SENSE<7:0>

Bank 1 programs inputs SENSE<15:8>

Bank 2 programs inputs SENSE<23:16>

Bank 3 programs inputs SENSE<31:24>

Setting a bit to “0” programs the 8 inputs in the bank to be GND/Open sensors.

Setting a bit to “1” programs the 8 inputs in the bank to be Supply/Open sensors.

TABLE 5.

76543210

MSB

LSB

PROGRAM SENSE BANKS REGISTER: PSEN<3:0>

Read: SPI Op-code 0x84

Write: SPI Op-code 0x04

Reset Value 00

[Opcode, DB0]

XXXX

DATA BYTE 0

DATA BYTE 0

ODD1 = 1

Odd inputs are set high

ODD0 = 1

Odd inputs are set low

ALL1 = 1

All inputs are set high

ALL0 = 1

All inputs are set low

Bit

Name

R/W Default

Description

7-4

-

R/W

0

Not Used.

3-0

TMDATA3-0 R/W

0

These 4 bits program the internal inputs to the sense comparators when in the test

mode.

Note: Only one mode can be selected. If more than one bit is high the inputs will all be set low.

76543210

MSB

TEST MODE DATA REGISTER : TMDATA

Read: SPI Op-code 0x9E

Write: SPI Op-code 0x1E

Reset Value 00

[Opcode, DB0]

X X

X

DATA BYTE 0

X