HI-8592, HI-8593, HI-8594

HOLT INTEGRATED CIRCUITS

4

FUNCTIONAL DESCRIPTION

Figure 1 is a block diagram of the line driver. The chip

requires a positive 5V supply at V+. The negative 5V

supply at V- may be from an external source or may be

provided using the on-chip negative rail generator by

connecting the two external capacitors, C

See Table 4 for recommended capacitor type.

Currents for slope control are set by on-chip resistors.

The TX0IN and TX1IN inputs receive logic signals from

a control transmitter chip such as the HI-3584. TX-

AOUT and TXBOUT hold each side of the ARINC bus

at Ground until one of the inputs becomes a One. If for

example TX1IN goes high, a charging path is enabled to

5V on an “A” side internal capacitor while the “B” side is

enabled to -5V. The charging current is selected by the

SLP pin. If the SLP pin is high, the capacitor is nominally

charged from 10% to 90% in 1.5μs. If SLP is low, the

rise and fall times are 10μs.

The reduced pin-count HI-8593 and HI-8594 require an

external -5V supply.

A unity gain buffer receives the internally generated

slopes and differentially drives the ARINC line. Cur-

rent is limited by the series output resistors at each pin.

There are no fuses at the outputs of the HI-859x family.

The HI-8593 has 37.5 ohms in series with each TXOUT

output and the HI-8594 has 5 ohms in series with each

AMP output. The AMP outputs are for applications

where external series resistance is required, typically

for lightning protection devices. Both output types are

available on the HI-8592. Holt Application Note AN-300

describes suitable lightning protection schemes.

All devices feature tri-stateable outputs to allow multiple

line drivers to be connected to the same ARINC 429

bus. Setting TX1IN and TX0IN both to a logic “1” puts

the outputs in the high-impedance state.

The HI-8592 family of line drivers are built using high-

speed CMOS technology. Care should be taken to en-

sure the V+ and V- supplies are locally decoupled to re-

duce noise. An application example is shown in Figure

2.

ABSOLUTE MAXIMUM RATINGS

Supply Voltages

V+ ........................................................... +7V

V- ........................................................... -7V

DC Current per input pin ................................... +10mA

Power Dissipation at 25

plastic SOIC ........... 1.0W, derate 10mW/

ceramic DIP ......... 0.5W, derate 7mW/

Solder Temperature (reflow) .............................. 260

Storage Temperature ....................... -65

Note: The HI-8592 family of drivers are available in small-

footprint, thermally enhanced SOIC and QFN (chip-scale)

packages. These packages include a metal heat sink located

on the bottom surface of the device. This heat sink should be

soldered down to the printed circuit board for optimum thermal

dissipation.

The heat sink is electrically isolated from the chip and can be

soldered to any ground or power plane.

RECOMMENDED OPERATING

CONDITIONS

Supply Voltages

V+ ................................... +4.85V to +5.25V

V- ................................... -5.25V to -4.85V

Temperature Range

Industrial ............................... -40

Extended ............................. -55

NOTE: Stresses above absolute maximum ratings or outside

recommended operating conditions may cause permanent

damage to the device. These are stress ratings only. Opera-

tion at the limits is not recommended.