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BU9728AKV Datasheet(PDF) 4 Page - Rohm |
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BU9728AKV Datasheet(HTML) 4 Page - Rohm |
4 / 24 page 4/23 ● Block Diagram (BU9728AKV) ●Pin Arrangement (BU9728AKV) Fig. BU9728AKV-5 Block diagram Fig. BU9728AKV-6 Pin arrangement ● Terminal description (BU9728AKV) Terminal No. Type Function OSC1 OSC2 1 2 I O Int clock use mode, connect resister between OSC1 and OSC2. Ext clock use mode, input clock from OSC1, OSC2 keep OPEN. V1~V3 3~5 Power supply for LCD driving. Keep VDD≧V1≧V2≧V3≧VSS condition. VSS 6 VSS terminal VDD 7 VDD terminal SCK 8 I Serial clock input SD 9 I Serial data input CS _________ 10 I Chip select input “L”: active C _____ / ____ D _____ 11 I Command data judgment input “L”: display data, “H”: command COM0~3 12~15 O LCD COMMON output RESET 16 I Reset input terminal. It will be initialized with "L" level input. Reset address counter, Set display off status. SEG0~ 31 17~48 O LCD SEGMENT output Serial Interface SD SCK C/D CS Command/Data Register Command Decoder Address Counter Timing Generator Common Counter Display Data RAM (DD RAM) LCD Segment Driver 32bits SEG0 SEG1 SEG31 LCD Common Driver 4bits COM1 COM2 COM0 COM3 LCD Driver Bias Circuit VSS V1 VDD V2 V3 RESET 123456789 10 11 12 13 14 15 16 24 23 22 21 20 19 18 17 COM1 COM2 COM3 SEG7 SEG1 SEG2 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG3 SEG4 SEG5 SEG6 RESET SEG0 36 35 34 33 32 31 30 29 28 27 26 25 SEG28 SEG29 SEG30 SEG31 47 46 45 44 48 37 38 39 40 41 42 43 |
Similar Part No. - BU9728AKV_08 |
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Similar Description - BU9728AKV_08 |
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