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BU9795AFV-E2 Datasheet(PDF) 2 Page - Rohm |
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BU9795AFV-E2 Datasheet(HTML) 2 Page - Rohm |
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2 / 24 page  2/23 ● Electrical Characteristics (BU9728AKV) DC Characteristics (VDD=2.5～5.5V, VSS=0V, Ta=25degree, unless otherwise specified) Parameter Symbo l Limit Uni t Condition Terminal Min. Typ. Max. “H” level input voltage VIH1 0.8×VDD - VDD V VO=0.9×VDD or 0.1×VDD SC1, SD, SCK, C _____ / ____ D _____ , C S __________ , RESET _______________________ “L” level input voltage VIL1 0 - 0.2×VDD V VO=0.1×VDD or 0.9×VDD LCD Driver on resistance RON - - 30 kΩ |△VON|=0.1V SEG0～31, COM0～3 “L” level Input current1 IIL1 - - 100 μA VIN=0 RESET _______________________ “L” level Input current2 IIL2 - - 2 μA VIN=0 OSC1, SD, SCK, C _____ / ____ D _____ , C S __________ “H” level Input current IIH -2 - - μA VIN=VDD OSC1, SD, SCK, C _____ / ____ D _____ , C S __________ , RESET _______________________ Input capacitance CI - 5 - pF SD, SCK, C _____ / ____ D _____ , C S __________ Power consumption IDD - 0.05 1 μA *2 Display OFF VDD - 40 80 μA *3 Display ON - 100 250 μA *4 MPU Access *1: LCD Driver on resistance is not included internal power supply impedance *2: V3=0V, All input terminal are connected to VDD or VSS. *3: V3=0V, Rf=470kΩ, except of OSC1 terminals are connected to VDD or VSS. *4: V3=0V, Rf=470kΩ, fSCK=200kHz AC Characteristics (VDD=2.5～5.5V, VSS=0V, Ta=25degree, unless otherwise specified) Parameter Symbo l Limit Unit Condition Min. Typ. Max. SCK rise time tTLH - - 100 ns SCK fall time tTHL - - 100 ns SCK cycle time tCYC 800 - - ns Wait time for command tWAIT 800 - - ns SCK pulse width ”H” tWH1 300 - - ns SCK pulse width ”L” tWL1 300 - - ns SD setup time tSU1 100 - - ns SD hold time tH1 100 - - ns CS pulse width ”H” tWH2 300 - - ns CS pulse width ”L” tWL2 6400 - - ns CS setup time tSU2 100 - - ns CS hold time tH2 100 - - ns C/D setup time tSU3 100 - - ns C/D hold time tH3 100 - - ns Based on SCK 8 th clock rising C/D – CS time *5 tCCH 100 - - ns Based on C S __________ rising C/D – SCK time *5 tSCH 100 - - ns Based o SCK 8 th clock falling *5: Should satisfy either one condition |
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