Electronic Components Datasheet Search |
|
H5TC4G43MFR Datasheet(PDF) 3 Page - Hynix Semiconductor |
|
H5TC4G43MFR Datasheet(HTML) 3 Page - Hynix Semiconductor |
3 / 34 page Rev. 1.0 / Nov. 2012 3 Description The H5TC4G43MFR-xxA, H5TC4G83MFR-xxA and H5TC4G63MFR-xxA are a 4Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operation at 1.35V. DDR3L SDRAM provides backward compatibility with the 1.5V DDR3 based environment without any changes. (Please refer to the SPD infor- mation for details.) SK hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the clock (fall- ing edges of the clock), data, data strobes and write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high band- width. Device Features and Ordering Information FEATURES • VDD=VDDQ=1.35V + 0.100 / - 0.067V • Fully differential clock inputs (CK, CK) operation • Differential Data Strobe (DQS, DQS) • On chip DLL align DQ, DQS and DQS transition with CK transition • DM masks write data-in at the both rising and falling edges of the data strobe • All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock • Programmable CAS latency 6, 7, 8, 9, 10 and 11, 13 supported • Programmable additive latency 0, CL-1, and CL-2 supported • Programmable CAS Write latency (CWL) = 5, 6, 7, 8, 9 Programmable burst length 4/8 with both nibble sequential and interleave mode • BL switch on the fly • 8banks • AverageRefreshCycle (Tcaseof0 oC~95oC) - 7.8 µs at 0oC ~ 85 oC - 3.9 µs at 85oC ~ 95 oC • JEDEC standard 78ball FBGA(x4/x8), 96ball FBGA (x16) • Driver strength selected by EMRS • Dynamic On Die Termination supported • Asynchronous RESET pin supported • ZQ calibration supported • TDQS (Termination Data Strobe) supported (x8 only) • Write Levelization supported • 8 bit pre-fetch • This product in compliance with the RoHS directive. |
Similar Part No. - H5TC4G43MFR |
|
Similar Description - H5TC4G43MFR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |