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TMS5700332APZQQ1 Datasheet(PDF) 1 Page - Texas Instruments |
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TMS5700332APZQQ1 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 101 page TMS570LS0432 TMS570LS0332 www.ti.com SPNS186 – OCTOBER 2012 TMS570LS0432/0332 16/32-Bit RISC Flash Microcontroller Check for Samples: TMS570LS0432 1 TMS570LS0432/0332 16/32-Bit RISC Flash Microcontroller 1.1 Features 1 • High-Performance Automotive Grade • Multiple Communication Interfaces Microcontroller for Safety Critical Applications – Two CAN Controllers (DCAN) – Dual CPU’s Running in Lockstep • DCAN1 - 32 Mailboxes with Parity – ECC on Flash and RAM interfaces Protection – Built-In Self Test for CPU and On-chip RAMs • DCAN2 - 16 Mailboxes with Parity Protection – Error Signaling Module with Error Pin • Compliant to CAN protocol Version 2.0B – Voltage and Clock Monitoring – Multi-buffered Serial Peripheral Interface • ARM® Cortex™ – R4 32-bit RISC CPU (MibSPI) – Efficient 1.66DMIPS/MHz with 8-stage • 128 Words with Parity Protection Pipeline – Two Standard Serial Peripheral Interfaces – 8-Region Memory Protection Unit (SPI) – Open Architecture with 3rd Party Support – UART (SCI) interface with Local Network • Operating Conditions Interface (LIN 2.1) support – 80MHz System Clock • High-End Timer Module (N2HET) – Core Supply Voltage (VCC): 1.2V nominal – Up to 19 Programmable Pins – I/O Supply Voltage (VCCIO): 3.3V nominal – 128 Word Instruction RAM with Parity – ADC Supply Voltage (VCCAD): 3.3V Nominal Protection • Integrated Memory – Each Includes Hardware Angle Generator – Up to 384kB Program Flash with ECC – Dedicated Transfer Unit (HTU) – 32kB RAM with ECC • Enhanced Quadrature Encoder Pulse (eQEP) – 16kB Flash for Emulated EEPROM with ECC – Motor Position Encoder Interface • Common Platform Architecture • 12-bit Multi-Buffered ADC Module – Consistent Memory Map Across Family – 16channels – Real-Time Interrupt Timer (RTI) OS Timer – 64 Result Buffers with Parity Protection – 96-channel Vectored Interrupt Module (VIM) • Up to 45 general purpose I/O (GIO) capable – 2-channel Cyclic Redundancy Checker (CRC) pins • Frequency-Modulated Phase-Locked-Loop – 8 Dedicated General-Purpose I/O (GIO) Pins (FMPLL) with Built-In Slip Detector with up to 8 External Interrupts • IEEE 1149.1 JTAG, Boundary Scan and ARM • Packages CoreSight Components – 100-pin Quad Flatpack (PZ) [Green] • Advanced JTAG Security Module (AJSM) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCT PREVIEW information concerns products in the formative or design phase of Copyright © 2012, Texas Instruments Incorporated development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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