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HMT84GL7MMR4A Datasheet(PDF) 4 Page - Hynix Semiconductor

Part # HMT84GL7MMR4A
Description  DDR3L SDRAM Load Reduced DIMM Based on 4Gb M-die
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HMT84GL7MMR4A Datasheet(HTML) 4 Page - Hynix Semiconductor

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Rev. 1.0 / Jan. 2013
4
Key Parameters
*SK hynix DRAM devices support optional downbinning to CL7. SPD setting is programmed to match
Speed Grade
Address Table
MT/s
Grade
tCK
(ns)
CAS
Latency
(tCK)
tRCD
(ns)
tRP
(ns)
tRAS
(ns)
tRC
(ns)
CL-tRCD-tRP
DDR3L-1066
-G7
1.875
7
13.125
13.125
37.5
50.625
7-7-7
DDR3L-1333
-H9
1.5
9
13.5
(13.125)*
13.5
(13.125)*
36
49.5
(49.125)*
9-9-9
Grade
Frequency [MHz]
Remark
CL6
CL7
CL8
CL9
CL10
-G7
800
1066
1066
-H9
800
1066
1066
1333
1333
32GB(4Rx4)
Refresh Method
8K/64ms
Row Address
A0-A15
Column Address
A0-A9,A11
Bank Address
BA0-BA2
Page Size
1KB


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