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SST26VF032 Datasheet(PDF) 4 Page - Silicon Storage Technology, Inc |
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SST26VF032 Datasheet(HTML) 4 Page - Silicon Storage Technology, Inc |
4 / 39 page ©2011 Silicon Storage Technology, Inc. DS-25017A 04/11 4 Serial Quad I/O (SQI) Flash Memory SST26VF016 / SST26VF032 Data Sheet A Microchip Technology Company Pin Description Figure 2: Pin Description for 8-lead SOIC and 8-contact WSON Table 1: Pin Description Symbol Pin Name Functions SCK Serial Clock To provide the timing of the serial interface. Commands, addresses, or input data are latched on the rising edge of the clock input, while output data is shifted out on the falling edge of the clock input. SIO[3:0] Serial Data Input/Output To transfer commands, addresses, or data serially into the device or data out of the device. Inputs are latched on the rising edge of the serial clock. Data is shifted out on the falling edge of the serial clock. The EQIO command instruction configures these pins for Quad I/O mode. SI Serial Data Input for SPI mode To transfer commands, addresses or data serially into the device. Inputs are latched on the rising edge of the serial clock. SI is the default state after a power on reset. SO Serial Data Output for SPI mode To transfer data serially out of the device. Data is shifted out on the falling edge of the serial clock. SO is the default state after a power on reset. CE# Chip Enable The device is enabled by a high to low transition on CE#. CE# must remain low for the duration of any command sequence; or in the case of Write oper- ations, for the command/data input sequence. VDD Power Supply To provide power supply voltage: 2.7-3.6V VSS Ground T1.0 25017 1 2 3 4 8 7 6 5 CE# SO/SIO1 SIO2 VSS VDD SIO3 SCK SI/SIO0 Top View 1359 08-soic S2A P1.0 1 2 3 4 8 7 6 5 CE# SO/SIO1 SIO2 VSS Top View VDD SIO3 SCK SI/SIO0 1359 08-wson QA P1.0 8-Lead SOIC 8-Contact WSON |
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