Rev. 1.1 /Aug. 2013

9

ROW AND COLUMN ADDRESS TABLE

1Gb

Note1: Page size is the number of bytes of data delivered from the array to the internal sense amplifiers

when an ACTIVE command is registered. Page size is per bank, calculated as follows:

 8

where COLBITS = the number of column address bits, ORG = the number of I/O (DQ) bits

Configuration

128Mb x 8

64Mb x 16

# of Banks

8

8

Bank Address

BA0 - BA2

BA0 - BA2

Auto precharge

A10/AP

A10/AP

BL switch on the fly

A12/BC

A12/BC

Row Address

A0 - A13

A0 - A12

Column Address

A0 - A9

A0 - A9

1 KB

2 KB