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AN-31 Datasheet(PDF) 10 Page - Power Integrations, Inc. |
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AN-31 Datasheet(HTML) 10 Page - Power Integrations, Inc. |
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10 / 20 page  AN-31 C 7/04 10 the transformer increases in the positive direction during t ON, and resets to zero during the interval t RZ. All the energy stored in the magnetizing inductance is removed during t RZ to charge theresetcapacitorandtheclampcapacitortomaximumvoltage. The flux increases in the negative direction during the interval t RN as the reset capacitor and the clamp capacitor discharge into the magnetizing inductance. The flux remains a constant negative value during the interval t V0, where the voltage on the transformer windings is zero. It is easy to see that the primary voltage is zero during t V0 because the drain voltage is the same astheinputof72V.Thenegativemagnetizingcurrentcirculates in the secondary winding during t V0. Figure 7(b) shows the drain voltage on the same circuit when it operates at the nominal input of 48 VDC. The larger duty ratio is consistent with the lower input voltage. Note that the intervals t RZ and tRN are the same as at 72 V input, but now tV0 is nearly zero. Figure 7(c) shows the situation at input voltage of 36VDC, with a corresponding larger duty ratio. The transformer has reset to zero flux because the drain voltage has reached its peak during the interval t RZ. The drain voltage is in the region of negative flux when the DPA-Switch turns on. Peakdrainvoltageundernormaloperatingconditionsshouldbe lessthan150V.Thisincludespeaksinthedrainvoltagefromthe reset of both leakage inductance and magnetizing inductance. Figure 8 shows three cases of improper transformer reset. The prototypeexamplehasbeenmodifiedtocreatetheseillustrations. The RC network has been removed from the output rectifier to obtain the waveform in Figure 8(a). The clamp capacitor C CP on the primary is 47 pF. The magnetizing energy resets into only the clamp capacitor and other stray capacitance. Consequently, at 72 V input the drain voltage goes higher than desired. The figure shows the maximum drain voltage at 152 V, in contrast to 140 V in Figure 7(a) with a proper reset network. The Zener clamp voltage of 150 V is specified at a current of 1 mA. Although the Zener clamp just barely conducts at 152 V, there is not sufficient margin in this design to tolerate a transformer with lower primary inductance. Figure8(b)illustratesthesituationoftoomuchcapacitance.The RC reset network has been restored with a proper capacitance of 2.2 nF, but C CP is increased to 470 pF, ten times the original value. The waveform shows operation at 36 VDC input and full load. The flux in the transformer has just barely reset to zero, as the DPA-Switch turns on at the end of the t RZ interval. Alarger magnetizing inductance or a lower input voltage would not allow the transformer to reset. The final example of an improper transformer reset is Figure 8(c). Primary clamp capacitor C CP is restored to its original value of 47 pF, but the reset capacitor is increased to 47 nF. The converter is operating at 36 VDC. The drain voltage shows clearly that the transformer is not resetting completely. The DPA-Switch turns on within the interval t RZ. The flux in the transformer has not returned to zero. A small change in operating conditions could cause the transformer to saturate on every cycle or to run so close to saturation that it could not accommodate change in duty ratio from a load step. Output Capacitors Theripplecurrentintheoutputinductorgeneratesavoltageripple on the output capacitors. Part of the ripple voltage comes from the integration of the current by the capacitance, and part comes from the voltage that appears across the capacitorʼs equivalent seriesresistance(ESR).Thecapacitormustbeselectedsuchthat the capacitance is high enough and the ESR is low enough to give acceptable voltage ripple with the chosen output inductor. Usually most of the ripple voltage comes from the ESR. Ripple voltage that is dominated by ESR has a triangular waveform like the ripple current in the inductor. Ripple voltage that is dominated by the capacitance has a waveform with segments that are parabolic instead of linear. Output capacitors in DC-DC converters are typically solid tantalum. They are a good choice because of their low ESR and low impedance at the frequencies used in these converters. The ESR is also an important element in the design of the feedback loop. In this regard, a moderate amount of ESR is desirable. The section on Feedback Design elaborates on the values of the components in the feedback circuit. It is important for designers to know that the value of ESR may change significantly over the specified temperature range. The output ripple and the stability of the control loop can be affected by the change in ESR. It is necessary to evaluate prototype hardware at the extremes of temperature to confirm satisfactory performance. The voltage rating for the capacitors is typically 25% higher thanthemaximumoperatingvoltageforreliability.Thederating factor is thus 80%. For example, a 5 V output would have a capacitor that is rated for either 6.3Vor 10V.The lower voltage capacitorwouldbesmaller,whereasthehighervoltagecapacitor would have a lower failure rate in the application. Feedback Design Stability is an important consideration for a switching power supply.Three parameters that describe the characteristics of the control loop are crossover frequency, phase margin and gain margin. The crossover frequency is the frequency where the magnitude of the loop gain passes through 0 dB. It is a measure of the systemʼs bandwidth. |
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