11

Control Word 1

Control Word  1. This  Control Word  performs  two  func-

tions:  serial/simultaneous  data  out  mode  and  external 

oscillator prescale select (see Table 2).

Control Register writes. The default mode (logic low) is 

neous mode which affects the Control Register only. In 

This arrangement allows multiple ICs to have their Control 

Registers written to simultaneously. For example, for N 

ICs in the serial mode, N * 8 clock pulses are needed to 

load the same data in all Control Registers. In the simul-

taneous  mode,  N  ICs  only  need  8  clock  pulses  to  load 

the same data in all Control Registers. The propagation 

of  an  external  Display  Oscillator. When  this  bit  is  logic 

low, the external Display Oscillator directly sets the inter-

nal display clock rate. When this bit is a logic high, the 

external oscillator is divided by 8. This scaled frequency 

then  sets  the  internal  display  clock  rate.  It  takes  512 

cycles of the display clock (or 8 x 512 = 4096 cycles of 

an external clock with the divide by 8 prescaler) to com-

pletely refresh the display once. Using the prescaler bit 

allows  the  designer  to  use  a  higher  external  oscillator 

frequency without extra circuitry.

This bit has no affect on the internal Display Oscillator 

Frequency.

These bits must always be programmed to logic low.

Cascaded ICs

Figure  3  shows  how  two  ICs  are  connected  within  an 

HCMS-29XX display. The first IC controls the four left-most 

characters and the second IC controls the four right-most 

characters. The Dot Registers are connected in series to 

form a 320-bit dot shift register. The location of pixel 0 

has not changed. However, Dot Shift Register bit 0 of IC2 

becomes bit 160 of the 320-bit dot shift register.

The  Control  Registers  of  the  two  ICs  are  independent 

of  each  other.  This  means  that  to  adjust  the  display 

brightness  the  same  control  word  must  be  entered 

into  both  ICs,  unless  the  Control  Registers  are  set  to 

simultaneous mode.

Longer character string systems can be built by cascad-

ing multiple displays together. This is accomplished by 

creating  a  five  line  bus. This  bus  consists  of  CE,  RS,  BL, 

Reset,  and  CLK. The  display  pins  are  connected  to  the 

corresponding bus line. Thus, all CE pins are connected to 

the CE bus line. Similarly, bus lines for RS, BL, Reset, and 

display is not used.

Each display may be set to use its internal oscillator, or 

the  displays  may  be  synchronized  by  setting  up  one 

display as the master and the others as slaves. The slaves 

are set to receive their oscillator input from the master’s 

oscillator output.