Electronic Components Datasheet Search |
|
AFBR-5803TZ Datasheet(PDF) 6 Page - AVAGO TECHNOLOGIES LIMITED |
|
AFBR-5803TZ Datasheet(HTML) 6 Page - AVAGO TECHNOLOGIES LIMITED |
6 / 16 page Figure 7. Recommended Decoupling and Termination Circuits Figure 6. Bit Error Rate vs. Relative Receiver Input Optical Power. -6 4 1 x 10 -2 RELATIVE INPUT OPTICAL POWER - dB -4 2 -2 0 1 x 10 -4 1 x 10 -6 1 x 10 -8 1 x 10 -10 1 x 10 -11 CONDITIONS: 1. 155 MBd 2. PRBS 27-1 3. CENTER OF SYMBOL SAMPLING 4. TA= +25˚C 5. VCC= 3.3 V to 5 V dc 6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns. 1 x 10 -12 1 x 10 -9 1 x 10 -7 1 x 10 -5 1 x 10 -3 CENTER OF SYMBOL AFBR-5803 SERIES NO INTERNAL CONNECTION NO INTERNAL CONNECTION AFBR-5803Z TOP VIEW V EE RD RD SD V CC V CC TD TD V EE 1 2 3 4 5 6 7 8 9 C1 C2 L1 L2 R2 R3 R1 R4 C5 C3 C4 R9 R10 V CC FILTER AT V CC PINS TRANSCEIVER R5 R7 R6 R8 C6 RD RD SD V CC TD TD TERMINATION AT PHY DEVICE INPUTS NOTES: THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED. R1 = R4 = R6 = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION. R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION. C1 = C2 = C3 = C5 = C6 = 0.1 µF. C4 = 10 µF. L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR. TERMINATION AT TRANSCEIVER INPUTS Rx Rx Tx Tx V CC V CC Rx Tx Transceiver Jitter Performance TheAvago Technologies 1300 nm transceivers are designed to operate per the system jitter allocations stated in Tables E1 of Annexes E of the FDDI PMD and LCF-PMD standards. The Avago Technologies1300 nm transmitters will tolerate the worst case input electrical jitter allowed in these tables without violating the worst case output jitter requirements of Sections 8.1 Active Output Interface of the FDDI PMD and LCF-PMD standards. The Avago Technologies 1300 nm receivers will tolerate the worst case input optical jitter allowed in Sections 8.2 Active Input Interface of the FDDI PMD and LCF-PMD standards without violating the worst case output electri- cal jitter allowed in the Tables E1 of the Annexes E. The jitter specifications stated in the following 1300 nm transceiver specification tables are derived from the values in Tables E1 of Annexes E. They represent the worst case jitter contribution that the transceivers are allowed to make to the overall system jitter without violating the Annex E allocation example. In practice the typical con- tribution of the Avago Technologies transceivers is well below these maximum allowed amounts. Recommended Handling Precautions Avago Technologies recommends that normal static pre- cautions be taken in the handling and assembly of these transceivers to prevent damage which may be induced by electrostatic discharge (ESD). The AFBR-5800 series of transceivers meet MIL-STD-883C Method 3015.4 Class 2 products. Care should be used to avoid shorting the receiver data or signal detect outputs directly to ground without proper current limiting impedance. |
Similar Part No. - AFBR-5803TZ |
|
Similar Description - AFBR-5803TZ |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |