ML4801

REV. 1.1 3/9/2001

9

operating frequency can typically be approximated by:

(5)

EXAMPLE:

For the application circuit shown in the data sheet, with

the oscillator running at:

PWM SECTION

The PWM section of the ML4801 is straightforward, but

there are several points which should be noted. Foremost

among these is its inherent synchronization to the PFC

section of the device, and that the PWM stage is

optimized for current-mode operation. In the ML4801, the

operating frequency of the PFC section is fixed at 1/2 of

the PWM's operating frequency. This is done through the

use of a 2:1 digital frequency divider ("T" flip-flop) linking

the two functional sections of the IC.

No voltage error amplifier is included in the PWM stage

of the ML4801, as this function is generally performed on

the output side of the PWM’s isolation boundary. To

facilitate the design of optocoupler feedback circuitry, an

offset has been built into the PWM’s RAMP 2 input which

input voltages below 1.25V.

PWM Current Limit

The RAMP 2 pin provides a direct input to the cycle-by-

cycle current limiter for the PWM section. Should the

input voltage at this pin ever exceed 1.5V, the output of

the PWM will be disabled until the output flip-flop is reset

by the clock pulse at the start of the next PWM power

cycle.

than its nominal 2.5V. Once this voltage reaches 2.5V,

which corresponds to the PFC output capacitor being

charged to its rated boost voltage, the soft-start

commences.

PWM Control (RAMP 2)

In addition to its PWM current limit function, RAMP 2 is

used as the sampling point for a voltage representing the

current in the primary of the PWM’s output transformer.

This voltage may be derived either by a current sensing

resistor or a current transformer.

Soft Start

Start-up of the PWM is controlled by the selection of the

external capacitor at SS. A current source of 25

µA

supplies the charging current for the capacitor, and start-

up of the PWM begins at 1.25V. Start-up delay can be

programmed by the following equation:

(6)

It is important that the time constant of the PWM soft-start

allow the PFC time to generate sufficient output power for

the PWM section. The PWM start-up delay should be at

least 5ms.

The ML4801 is a voltage-fed part. It requires an external

15V

±10% or better Zener shunt voltage regulator, or some

the part at 15V nominal. This allows a low power

dissipation while at the same time delivering 13V

nominal of gate drive at the PWM OUT and PFC OUT

outputs. If using a Zener diode, it is important to limit the

current through the Zener to avoid overheating or

destroying it. This can be easily done with a single resistor

in series with the Vcc pin, returned to a bias supply of

typically 18V to 20V. The resistor’s value must be chosen

to meet the operating current requirement of the ML4801

itself (8.5mA max.) plus the current required by the two

gate driver outputs.

EXAMPLE:

driving a total gate charge of 110nC at 100kHz (1 IRF840

MOSFET and 2 IRF830 MOSFETs), the gate driver current

required is:

The ML4801 should be locally bypassed with a 10nF and

a 1

µF ceramic capacitor. In most applications, an

electrolytic capacitor of between 33

µF and 100µF is also

required across the part, both for filtering and as part of

the start-up bootstrap circuitry.

operating frequency can typically be approximated by:

f

t

OSC

RAMP

=

1

(5)

EXAMPLE:

For the application circuit shown in the data sheet, with

the oscillator running at:

fkHz

t

OSC

RAMP

==

100

1

tR

C

RAMP

T

T

=´

´

= ´

-

051

1 10

5

.

PWM SECTION

The PWM section of the ML4801 is straightforward, but

there are several points which should be noted. Foremost

among these is its inherent synchronization to the PFC

section of the device, and that the PWM stage is

optimized for current-mode operation. In the ML4801, the

operating frequency of the PFC section is fixed at 1/2 of

the PWM's operating frequency. This is done through the

use of a 2:1 digital frequency divider ("T" flip-flop) linking

the two functional sections of the IC.

No voltage error amplifier is included in the PWM stage

of the ML4801, as this function is generally performed on

the output side of the PWM’s isolation boundary. To

facilitate the design of optocoupler feedback circuitry, an

offset has been built into the PWM’s RAMP 2 input which

input voltages below 1.25V.

PWM Current Limit

The RAMP 2 pin provides a direct input to the cycle-by-

cycle current limiter for the PWM section. Should the

input voltage at this pin ever exceed 1.5V, the output of

the PWM will be disabled until the output flip-flop is reset

by the clock pulse at the start of the next PWM power

cycle.

than its nominal 2.5V. Once this voltage reaches 2.5V,

which corresponds to the PFC output capacitor being

charged to its rated boost voltage, the soft-start

commences.

PWM Control (RAMP 2)

In addition to its PWM current limit function, RAMP 2 is

used as the sampling point for a voltage representing the

current in the primary of the PWM’s output transformer.

This voltage may be derived either by a current sensing

resistor or a current transformer.

Soft Start

Start-up of the PWM is controlled by the selection of the

external capacitor at SS. A current source of 25µA

supplies the charging current for the capacitor, and start-

up of the PWM begins at 1.25V. Start-up delay can be

programmed by the following equation:

Ct

A

V

SS

DELAY

=×

25

125

µ

.

(6)

It is important that the time constant of the PWM soft-start

allow the PFC time to generate sufficient output power for

the PWM section. The PWM start-up delay should be at

least 5ms.

Cms

A

V

nF

=

5

25

125

100

µ

.

The ML4801 is a voltage-fed part. It requires an external

15V±10% or better Zener shunt voltage regulator, or some

the part at 15V nominal. This allows a low power

dissipation while at the same time delivering 13V

nominal of gate drive at the PWM OUT and PFC OUT

outputs. If using a Zener diode, it is important to limit the

current through the Zener to avoid overheating or

destroying it. This can be easily done with a single resistor

in series with the Vcc pin, returned to a bias supply of

typically 18V to 20V. The resistor’s value must be chosen

to meet the operating current requirement of the ML4801

itself (8.5mA max.) plus the current required by the two

gate driver outputs.

EXAMPLE:

driving a total gate charge of 110nC at 100kHz (1 IRF840

MOSFET and 2 IRF830 MOSFETs), the gate driver current

required is:

IkHz

nC

mA

=

100

110

11

R

VV

mA

mA

-

+

=

20

16 5

75

11

180

.

.

Ω

The ML4801 should be locally bypassed with a 10nF and

a 1

µF ceramic capacitor. In most applications, an

electrolytic capacitor of between 33µF and 100µF is also

required across the part, both for filtering and as part of

the start-up bootstrap circuitry.