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MC908GR8CDWE Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MC908GR8CDWE Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 408 page Table of Contents Technical Data MC68HC908GR8 — Rev 4.0 10 Table of Contents MOTOROLA Section 8. Configuration Register (CONFIG) 8.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 8.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 8.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Section 9. Computer Operating Properly (COP) 9.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 9.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 9.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 9.4 I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 9.5 COP Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 9.6 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 9.7 Monitor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 9.8 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137 9.9 COP Module During Break Mode . . . . . . . . . . . . . . . . . . . . . .137 Section 10. Central Processing Unit (CPU) 10.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 10.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 10.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 10.4 CPU registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 10.5 Arithmetic/logic unit (ALU) . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 10.6 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145 10.7 CPU during break interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . 146 10.8 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 10.9 Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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