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ML6427CS Datasheet(PDF) 6 Page - Fairchild Semiconductor

Part # ML6427CS
Description  75W Quad Video Cable Drivers and Filters with Switchable Inputs
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

ML6427CS Datasheet(HTML) 6 Page - Fairchild Semiconductor

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ML6427
6
FUNCTIONAL DESCRIPTION
The ML6427 is a quad monolithic continuous time analog
video filter designed for reconstructing signals from four
video D/A sources. The ML6427 is intended for use in AC
coupled input and output applications.
The filters approximate a 4th-order Butterworth
characteristic with an optimization toward low overshoot
and flat group delay. All outputs are capable of driving
2VP-P into AC coupled 150W video loads with up to 35pF
of load capacitance at the output pin. They are also
capable of driving a 75
W load at 1VP-P.
All channels are clamped during sync to establish the
appropriate output voltage swing range. Consequently the
input coupling capacitors do not behave according to the
conventional RC time constant. Clamping for all channels
settles within 10ms of a change in video sources.
Input coupling capacitors of 0.1µF are recommended for
all channels. During sync a feedback error amplifier
sources/sinks current to restore the DC level. The net result
is that the average input current is zero. Any change in the
value of the input coupling capacitors will linearly affect
the clamp response times.
The RGB channels have no pulldown current sources and
are essentially tilt-free. The inputs of the CV channels sink
less than 1µA during active video, resulting in a tilt of less
than 1mV for 220µF output capacitors. A 1000µF
capacitor is recommended for TV applications to minimize
tilt in the CV channels.
SWAP MULTIPLEXER CONTROL
Output pins CVOUT1/YOUTA and CVOUT2/YOUTB are each
independently selectable among three input sources
(CVINU/Y1, CVINFA/Y2, or CVINFB/Y3) depending on the
state of digital inputs SWAP CVF, SWAP CVU, and A/B
MUX. This allows the two outputs to remain independent
and pass straight through, or to remain independent but
swapped, or for both outputs to have the same signal
sourcing from either CVINU/Y1, CVINFA/Y2, or CVINFB/Y3
(See Table 1). If SWAP CVF is forced to logic low then
CVOUT2/YOUTB is sourced from either the CVINFA/Y2 OR
THE CVINFB/Y3 input. If SWAP CVU is logic low then
CVOUT1/YOUTA provides video from either the CVINFA/Y2
OR THE CVINFB/Y3 input. If SWAP CVF is logic high then
CVOUT2/YOUTB provides video from the CVINU/Y1 input.
If SWAP CVU is high then CVOUT1/YOUTA provides video
from either the CVINFA/Y2 or the CVINFB/Y3 input. Both
SWAP CVF and SWAP CVU will pull low if they are not
driven.
The ML6427 is robust and stable under all stated load and
input conditions. Bypassing both VCC pins directly to
ground ensures this performance. Two ML6427s can be
connected in a master-slave sync configuration. When
using this configuration (See Figure 6) only the “master”
ML6427 is required to have a signal with embedded sync
present on the CVINFA/Y2 and CVINFB/Y3 inputs. In the
absence of sync on the CVINFA/Y2 and CVINFB/Y3 inputs
of the “slave” ML6427 it will have its SYNCIN input
connected to the SYNCOUT output of the “master”
ML6427.
SYNCIN AND SYNCOUT PINS
Each ML6427 has two sync detectors which control the
DC restore functions. The unfiltered channel has its own
detector, which controls the DC restore function during
the horizontal sync period of the CVINU/Y1 input. The
other sync detector controls the DC restore functions for
the filtered channels based upon the composite or luma
silgnal at the CVINFA/Y2 or CVINFB/Y3 input.
Required Setup: A composite or luma or green signal
must be present on CVINFA/Y2 or CVINFB/Y3 inputs to
provide necessary sync signals to other channels (R, G, B,
Y, C). Otherwise, sync must be provided at the SYNCIN
pin. For RGB applications the green channel with sync can
be used as an input to CVINFA/Y2 or CVINFB/Y3.
The SYNCOUT pin provides a logic high when it detects
the horizontal sync of either the CVINFA/Y2 or CVINFB/Y3
input (note that one input is selected by the A/B MUX pin).
The SYNCIN pin is an input for an external H-sync logic
signal to enable or disable the internal DC restore loop for
the filtered channels. When SYNCIN is logic high the DC
restore function is enabled.
For normal operation the SYNCOUT pin is connected to
the SYNCIN pin (see Figure 4). If neither the CVINFA/Y2
nor the CVINFB/Y3 has an embedded sync an external
sync can be applied on the SYNCIN pin. In master-slave
configurations the SYNCOUT of a ML6427 master can be
used as the SYNCIN of a ML6427 slave (see Figure 6).
VIDEO I/O DESCRIPTION
Each input is driven by either a low impedance source or
the output of a 75
W terminated line. The input is required
to be AC coupled via a 0.1µF coupling capacitor which
gives a nominal clamping time of 10ms. All outputs are
capable of driving an AC coupled 150
W load at 2VP-P or
1VP-P into a 75W load. At the output pin, up to 35pF of
load capacitance can be driven without stability or slew
issues. A 220µF AC coupling capacitor is recommended at
the output to reduce power consumption. For DC coupled
outputs see the Typical Applications section.
ANALOG MULTIPLEXER CONTROL
The four filter channels each have two input multiplexers
which are paired to select between two four-channel
video sources (
i.e., composite video plus RGB component
video). If A/B MUX is forced to logic high, it will select
Bank<A> of the video inputs (CVINFA/Y2, RINA/Y4, GINA/
Y6, BINA/C1) to be enabled. If A/B MUX is logic low then
Bank<B> of video inputs (CVINFB/Y3, RINB/Y5,GINB/Y7,
BINFB/C2) will be selected. If the A/B MUX is open it will
pull to logic high.


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