September 1983

Revised February 1999

© 1999 Fairchild Semiconductor Corporation

DS005314.prf

www.fairchildsemi.com

MM74HC157

Quad 2-Input Multiplexer

General Description

The MM74HC157 high speed Quad 2-to-1 Line data selec-

tor/Multiplexers utilizes advanced silicon-gate CMOS tech-

nology. It possesses the high noise immunity and low

power consumption of standard CMOS integrated circuits,

as well as the ability to drive 10 LS-TTL loads.

This device consists of four 2-input digital multiplexers with

common select and STROBE inputs. When the STROBE

input is at logical “0” the four outputs assume the values as

selected from the inputs. When the STROBE input is at a

logical “1” the outputs assume logical “0”.

The 74HC logic family is functionally as well as pin-out

compatible with the standard 74LS logic family. All inputs

are protected from damage due to static discharge by inter-

Features

s Typical propagation delay: 14 ns data to any output

s Wide power supply range: 2–6V

s Low power supply quiescent current: 80

µA maximum

(74HC Series)

s Fan-out of 10 LS-TTL loads

s Low input current: 1

µA maximum

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Function Table

H

= HIGH Level,

L

= LOW Level

X

= Irrelevant

Order Number

Package Number

Package Description

MM74HC157M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

MM74HC157SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC157MTC

MTC16

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC157N

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Inputs

Output

Strobe

Select

A

B

Y

HX

X

X

L

LL

L

X

L

LL

H

X

H

LH

X

L

L

LH

X

H

H