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C8051F341-GQ Datasheet(PDF) 5 Page - Silicon Laboratories |
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C8051F341-GQ Datasheet(HTML) 5 Page - Silicon Laboratories |
5 / 276 page Rev. 1.3 5 C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D 14.5.1.System Clock Selection ......................................................................... 139 14.5.2.USB Clock Selection .............................................................................. 139 15. Port Input/Output.................................................................................................. 142 15.1.Priority Crossbar Decoder .............................................................................. 144 15.2.Port I/O Initialization ....................................................................................... 147 15.3.General Purpose Port I/O ............................................................................... 150 16. Universal Serial Bus Controller (USB0).............................................................. 159 16.1.Endpoint Addressing ...................................................................................... 160 16.2.USB Transceiver ............................................................................................ 160 16.3.USB Register Access ..................................................................................... 162 16.4.USB Clock Configuration................................................................................ 166 16.5.FIFO Management ......................................................................................... 167 16.5.1.FIFO Split Mode ..................................................................................... 167 16.5.2.FIFO Double Buffering ........................................................................... 168 16.5.3.FIFO Access .......................................................................................... 168 16.6.Function Addressing....................................................................................... 169 16.7.Function Configuration and Control................................................................ 169 16.8.Interrupts ........................................................................................................ 172 16.9.The Serial Interface Engine ............................................................................ 176 16.10.Endpoint0 ..................................................................................................... 176 16.10.1.Endpoint0 SETUP Transactions .......................................................... 177 16.10.2.Endpoint0 IN Transactions................................................................... 177 16.10.3.Endpoint0 OUT Transactions............................................................... 178 16.11.Configuring Endpoints1-3 ............................................................................. 180 16.12.Controlling Endpoints1-3 IN.......................................................................... 180 16.12.1.Endpoints1-3 IN Interrupt or Bulk Mode............................................... 180 16.12.2.Endpoints1-3 IN Isochronous Mode..................................................... 181 16.13.Controlling Endpoints1-3 OUT...................................................................... 183 16.13.1.Endpoints1-3 OUT Interrupt or Bulk Mode........................................... 183 16.13.2.Endpoints1-3 OUT Isochronous Mode................................................. 184 17. SMBus ................................................................................................................... 188 17.1.Supporting Documents ................................................................................... 189 17.2.SMBus Configuration...................................................................................... 189 17.3.SMBus Operation ........................................................................................... 189 17.3.1.Arbitration............................................................................................... 190 17.3.2.Clock Low Extension.............................................................................. 191 17.3.3.SCL Low Timeout................................................................................... 191 17.3.4.SCL High (SMBus Free) Timeout .......................................................... 191 17.4.Using the SMBus............................................................................................ 191 17.4.1.SMBus Configuration Register............................................................... 192 17.4.2.SMB0CN Control Register ..................................................................... 195 17.4.3.Data Register ......................................................................................... 198 17.5.SMBus Transfer Modes.................................................................................. 198 17.5.1.Master Transmitter Mode ....................................................................... 198 17.5.2.Master Receiver Mode ........................................................................... 200 |
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