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MM74HC244 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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MM74HC244 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2000 Fairchild Semiconductor Corporation DS005327 www.fairchildsemi.com September 1983 Revised August 2000 MM74HC244 Octal 3-STATE Buffer General Description The MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable indepen- dently controls 4 buffers. This device does not have Schmitt trigger inputs. These 3-STATE buffers utilize advanced silicon-gate CMOS technology and are general purpose high speed non-inverting buffers. They possess high drive current out- puts which enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low power Schottky devices, while retaining the advantage of CMOS circuitry, i.e., high noise immunity, and low power consumption. All three devices have a fanout of 15 LS-TTL equivalent inputs. All inputs are protected from damage due to static dis- charge by diodes to VCC and ground. Features s Typical propagation delay: 14 ns s 3-STATE outputs for connection to system buses s Wide power supply range: 2–6V s Low quiescent supply current: 80 µA s Output current: 6 mA Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Top View Truth Table H = HIGH Level L = LOW Level Z = High Impedance Order Number Package Number Package Description MM74HC244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide MM74HC244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 1G 1A 1Y 2G 2A 2Y LLL LLL LH H L H H HL Z H L Z HH Z H H Z |
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