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E-GSM900 Datasheet(PDF) 9 Page - Silicon Laboratories

Part No. E-GSM900
Description  Single 8x8 mm package CMOS process technology Intergrated GSM/GPRS transceiver including
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Maker  SILABS [Silicon Laboratories]
Homepage  http://www.silabs.com
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 9 page
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Aero I
Rev. 1.0
9
Analog PGA Control Range
∆GAPGA
13
16
19
dB
Analog PGA Step Size
3.2
4.0
4.8
dB
Digital PGA Control Range
∆GDPGA
—63—
dB
Digital PGA Step Size
—1—
dB
Maximum Differential Output Voltage9
DACFS[1:0] = 00
0.7
1.0
1.3
VPPD
DACFS[1:0] = 01
1.5
2.0
2.5
VPPD
DACFS[1:0] = 10
2.6
3.5
4.4
VPPD
Output Common Mode Voltage9
DACCM[1:0] = 00
0.8
1.0
1.2
V
DACCM[1:0] = 01
1.05
1.25
1.45
V
DACCM[1:0] = 10
1.15
1.35
1.55
V
Differential Output Offset Voltage9,10,11
——
16
mV
Differential Output Offset Voltage Drift9,10,11
——
5
mV
Baseband Gain Error9,11
——
1
%
Baseband Phase Error9,11
——
1
deg
Output Load Resistance9
RL
Single-ended
10
k
Output Load Capacitance9
CL
Single-ended
10
pF
Group Delay12
CSEL = 0
22
µs
CSEL = 1
16
µs
Differential Group Delay12
CSEL = 0
1.5
µs
CSEL = 1
1
µs
Powerup Settling Time3,13
From powerdown
200
220
µs
Notes:
1. GSM input pins RFIGP and RFIGN. DCS input pins RFIDP and RFIDN. PCS input pins RFIPP and RFIPN.
2. Measurement is performed with a 2:1 balun (50
Ω input, 200 Ω balanced output) and includes matching network and
PCB losses. Measured at max gain (AGAIN[2:0] =100b, LNAG[1:0] = 01b, LNAC[1:0] = 01b) unless otherwise noted.
Noise figure measurements are referred to 290 °K. Insertion loss of the balun is removed.
3. Specifications guaranteed by characterization using LQW15AN series matching inductors.
4. Input signal at balun is –102 dBm. SNR at baseband output is 9 dB.
5. AGAIN[2:0]=min=000b, LNAG[1:0] = max=01b, LNAC[1:0] =max= 01b.
6. AGAIN[2:0]=min=000b, LNAG[1:0] = min=00b, LNAC[1:0] = min=00b.
7. Voltage gain is defined as the differential rms voltage at the RXIP/RXIN pins or RXQP/RXQN pins divided by the rms
voltage at the balun input with DACFS[1:0] = 01 and CSEL = 1. Gain is 1.5 dB higher with CSEL = 0. Minimum and
maximum values do not include the variation in the DAC full scale voltage (also see Maximum Differential Output
Voltage specification).
8. Voltage gain is defined as the differential rms voltage at the LNA output divided by the rms voltage at the balun output.
9. Output pins RXIP, RXIN, RXQP, RXQN.
10. Specified as root sum square:
. Drift specification applies to dc offset
calibration and is guaranteed by characterization. See ZERODEL[2:0] in the register description.
11. The baseband signal path is entirely digital. Gain, phase, and offset errors at the baseband outputs are because of the
D/A converters. Offsets can be measured and calibrated out. See ZERODEL[2:0] in the register description.
12. Group delay is measured from antenna input to baseband outputs. Differential group delay is measured in-band.
13. Includes settling time of the frequency synthesizer. Settling to 5 degrees phase error measured at RXIP, RXIN, RXQP,
and RXQN pins.
Table 5. Receiver Characteristics (Continued)
(VDD = 2.7 to 3.0 V, TA = –20 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
RXIP RXIN
()
2
RXQP RXQN
()
2
+




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