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NTS0102-Q100 Datasheet(PDF) 3 Page - NXP Semiconductors |
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NTS0102-Q100 Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 21 page NTS0102-Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 1 — 27 February 2013 3 of 21 NXP Semiconductors NTS0102-Q100 Dual supply translating transceiver; open drain; auto direction sensing 7. Pinning information 7.1 Pinning 7.2 Pin description 8. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. [2] When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode. Fig 2. Pin configuration SOT505-2 (TSSOP8) Fig 3. Pin configuration SOT996-2 (XSON8) 1764 % % *1' 9&&% 9&&$ 2( $ $ DDD DDD 1764 7UDQVSDUHQW WRS YLHZ % *1' 9&&$ $ % 9&&% 2( $ Table 3. Pin description Symbol Pin Description B2, B1 1, 8 data input or output (referenced to VCC(B)) GND 2 ground (0 V) VCC(A) 3 supply voltage A A2, A1 4, 5 data input or output (referenced to VCC(A)) OE 6 output enable input (active HIGH; referenced to VCC(A)) VCC(B) 7 supply voltage B n.c. - not connected Table 4. Function table[1] Supply voltage Input Input/output VCC(A) VCC(B) OE An Bn 1.65 V to VCC(B) 2.3 V to 5.5 V L Z Z 1.65 V to VCC(B) 2.3 V to 5.5 V H input or output output or input GND[2] GND[2] XZ Z |
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