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PBSS4160PAN Datasheet(PDF) 8 Page - NXP Semiconductors |
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PBSS4160PAN Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 17 page NXP Semiconductors PBSS4160PAN 60 V, 1 A NPN/NPN low VCEsat (BISS) transistor PBSS4160PAN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved Product data sheet 14 January 2013 8 / 17 006aac611 10- 5 10 10- 2 10- 4 102 10- 1 tp (s) 10- 3 103 1 102 10 103 Zth(j-a) (K/W) 1 0 duty cycle = 1 0.01 0.02 0.05 0.1 0.2 0.33 0.5 0.75 FR4 PCB 70 µm, mounting pad for collector 1 cm2 Fig. 7. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aad170 10-5 10 10-2 10-4 102 10-1 tp (s) 10-3 103 1 102 10 103 Zth(j-a) (K/W) 1 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01 0 4-layer PCB 70 µm, standard footprint Fig. 8. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values |
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