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PBSS5230PAP Datasheet(PDF) 6 Page - NXP Semiconductors |
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PBSS5230PAP Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 17 page NXP Semiconductors PBSS5230PAP 30 V, 2 A PNP/PNP low VCEsat (BISS) transistor PBSS5230PAP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved Product data sheet 11 January 2013 6 / 17 006aad167 10-5 10 10-2 10-4 102 10-1 tp (s) 10-3 103 1 102 10 103 Zth(j-a) (K/W) 1 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01 0 FR4 PCB 35 µm, mounting pad for collector 1 cm2 Fig. 3. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aad168 10-5 10 10-2 10-4 102 10-1 tp (s) 10-3 103 1 102 10 103 Zth(j-a) (K/W) 1 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01 0 4-layer PCB 35 µm, standard footprint Fig. 4. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values |
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